diff options
| author | Marek Olšák <[email protected]> | 2013-06-24 03:04:58 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2013-07-01 03:02:43 +0200 |
| commit | b1693194eee7e99ef8abb6c8319834bd93879400 (patch) | |
| tree | f773b1dee2a9cedf7d7008db3ba5677a9592e4f0 /src/gallium/drivers/r600/evergreen_compute.c | |
| parent | f83e220d360776dae0fbb61df3741501c2dd4d96 (diff) | |
r600g/compute: disable unused colorbuffer slots
Reviewed-by: Alex Deucher <[email protected]>
Tested-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/evergreen_compute.c')
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_compute.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index 9be9b9944a8..fd8d788564a 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -412,7 +412,8 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout, r600_flush_emit(ctx); /* Emit colorbuffers. */ - for (i = 0; i < ctx->framebuffer.state.nr_cbufs; i++) { + /* XXX support more than 8 colorbuffers (the offsets are not a multiple of 0x3C for CB8-11) */ + for (i = 0; i < 8 && i < ctx->framebuffer.state.nr_cbufs; i++) { struct r600_surface *cb = (struct r600_surface*)ctx->framebuffer.state.cbufs[i]; unsigned reloc = r600_context_bo_reloc(ctx, &ctx->rings.gfx, (struct r600_resource*)cb->base.texture, @@ -438,6 +439,16 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout, r600_write_value(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */ r600_write_value(cs, reloc); } + if (ctx->keep_tiling_flags) { + for (; i < 8 ; i++) { + r600_write_compute_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, + S_028C70_FORMAT(V_028C70_COLOR_INVALID)); + } + for (; i < 12; i++) { + r600_write_compute_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C, + S_028C70_FORMAT(V_028C70_COLOR_INVALID)); + } + } /* Set CB_TARGET_MASK XXX: Use cb_misc_state */ r600_write_compute_context_reg(cs, R_028238_CB_TARGET_MASK, |