diff options
| author | Vadim Girlin <[email protected]> | 2013-08-02 06:38:23 +0400 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2014-02-05 10:49:11 +1000 |
| commit | 1371d65a7fbd695d3516861fe733685569d890d0 (patch) | |
| tree | 8c387665f364abadb25a1a6817c7178ec4aff39d /src/gallium/drivers/r600/eg_asm.c | |
| parent | 34ee1d0f9f64cd19ed0ddbbbf82db6230afca71d (diff) | |
r600g: initial support for geometry shaders on evergreen (v2)
This is Vadim's initial work with a few regression fixes squashed in.
v2: (airlied)
fix regression in glsl-max-varyings - need to use vs and ps_dirty
fix regression in shader exports from rebasing.
whitespace fixing.
v2.1: squash fix assert
Signed-off-by: Vadim Girlin <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/eg_asm.c')
| -rw-r--r-- | src/gallium/drivers/r600/eg_asm.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/gallium/drivers/r600/eg_asm.c b/src/gallium/drivers/r600/eg_asm.c index 5ad3d771974..acb30409428 100644 --- a/src/gallium/drivers/r600/eg_asm.c +++ b/src/gallium/drivers/r600/eg_asm.c @@ -93,8 +93,8 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf) if (bc->chip_class == EVERGREEN) /* no EOP on cayman */ bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program); id++; - } else if (cfop->flags & CF_STRM) { - /* MEM_STREAM instructions */ + } else if (cfop->flags & CF_MEM) { + /* MEM_STREAM, MEM_RING instructions */ bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) | S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) | S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) | @@ -109,12 +109,13 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf) bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program); id++; } else { - /* branch, loop, call, return instructions */ + /* other instructions */ bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1); bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(opcode)| S_SQ_CF_WORD1_BARRIER(1) | S_SQ_CF_WORD1_COND(cf->cond) | - S_SQ_CF_WORD1_POP_COUNT(cf->pop_count); + S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) | + S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program); } } return 0; |