diff options
author | Marek Olšák <[email protected]> | 2015-04-16 19:41:33 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2015-08-14 15:02:28 +0200 |
commit | e7fc664b91a5d886c2709d05a498f6a1dfbaf136 (patch) | |
tree | 1f0939533c7d083a0ce671ea9c7ea9e316410961 /src/gallium/drivers/r300/r300_state.c | |
parent | 2eb067db0febcd71b4182153155e3e43f215624c (diff) |
winsys/amdgpu: add addrlib - texture addressing and alignment calculator
This is an internal project that Catalyst uses and now open source will do
too.
v2: squashed these commits in:
- winsys/amdgpu: fix warnings in addrlib
- winsys/amdgpu: set PIPE_CONFIG and NUM_BANKS in tiling_flags
Diffstat (limited to 'src/gallium/drivers/r300/r300_state.c')
-rw-r--r-- | src/gallium/drivers/r300/r300_state.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index e886df87a60..d99d5ae0152 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -844,7 +844,7 @@ static void r300_tex_set_tiling_flags(struct r300_context *r300, tex->tex.macrotile[level]) { r300->rws->buffer_set_tiling(tex->buf, r300->cs, tex->tex.microtile, tex->tex.macrotile[level], - 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, tex->tex.stride_in_bytes[0], false); tex->surface_level = level; |