diff options
author | Marek Olšák <[email protected]> | 2010-06-27 13:55:59 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2010-06-27 15:13:14 +0200 |
commit | 0a19d57b845b269601c862193ed801b19aa4c2f1 (patch) | |
tree | 337506ab9a69fb7a8245763acf08c37cb75284ee /src/gallium/drivers/r300/r300_emit.c | |
parent | 808ad22592b4937e3c7c17793b2f891fb01c5dfb (diff) |
r300g: separate the hyperz state and pipelined FB regs out of the FB state
Diffstat (limited to 'src/gallium/drivers/r300/r300_emit.c')
-rw-r--r-- | src/gallium/drivers/r300/r300_emit.c | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index d72b6d98db1..014b382edf3 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -349,7 +349,6 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) surf = r300_surface(fb->zsbuf); OUT_CS_REG(R300_ZB_FORMAT, surf->format); - OUT_CS_REG(R300_ZB_BW_CNTL, 0); OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain, 0); @@ -357,8 +356,6 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1); OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain, 0); - OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0); - /* HiZ RAM. */ if (r300->screen->caps.has_hiz) { OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0); @@ -370,6 +367,26 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) OUT_CS_REG(R300_ZB_ZMASK_PITCH, 0); } + END_CS; +} + +void r300_emit_hyperz_state(struct r300_context *r300, + unsigned size, void *state) +{ + CS_LOCALS(r300); + WRITE_CS_TABLE(state, size); +} + +void r300_emit_fb_state_pipelined(struct r300_context *r300, + unsigned size, void *state) +{ + struct pipe_framebuffer_state* fb = + (struct pipe_framebuffer_state*)r300->fb_state.state; + unsigned i; + CS_LOCALS(r300); + + BEGIN_CS(size); + /* Colorbuffer format in the US block. * (must be written after unpipelined regs) */ OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); |