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authorChristoph Bumiller <[email protected]>2013-03-27 23:39:06 +0100
committerChristoph Bumiller <[email protected]>2013-03-29 00:33:01 +0100
commitee624ced364bfd2f896809874ef3a808a11c5ecf (patch)
tree3ca90f856159a2a932df731a64255096b2ece61c /src/gallium/drivers/nvc0/nvc0_winsys.h
parent480359bcf644c496c5318e89fe7ad60d95772acd (diff)
nvc0: implement MP performance counters
There's more, but this only adds (most) of the counters that are handled directly by the shader processors. The other counter domains are not handled on the multiprocessor and there are no FIFO object methods for configuring them. Instead, they have to be programmed by the kernel via PCOUNTER, and the interface for this isn't in place yet.
Diffstat (limited to 'src/gallium/drivers/nvc0/nvc0_winsys.h')
-rw-r--r--src/gallium/drivers/nvc0/nvc0_winsys.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nvc0/nvc0_winsys.h b/src/gallium/drivers/nvc0/nvc0_winsys.h
index c13ebd5fb58..25183a45f20 100644
--- a/src/gallium/drivers/nvc0/nvc0_winsys.h
+++ b/src/gallium/drivers/nvc0/nvc0_winsys.h
@@ -65,6 +65,8 @@ PUSH_REFN(struct nouveau_pushbuf *push, struct nouveau_bo *bo, uint32_t flags)
#define SUBC_COPY(m) 4, (m)
#define NVE4_COPY(m) SUBC_COPY(NVE4_COPY_##n)
+#define SUBC_SW(m) 7, (m)
+
static INLINE uint32_t
NVC0_FIFO_PKHDR_SQ(int subc, int mthd, unsigned size)
{