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authorMarek Olšák <[email protected]>2012-04-24 17:31:17 +0200
committerMarek Olšák <[email protected]>2012-04-30 01:09:57 +0200
commit1b749dc34f8d83cf3dfa863279b1fe2b356d34b2 (patch)
treec15b71f02f9e2ffd95a03f8ffe98c212dc22dffd /src/gallium/drivers/nvc0/nvc0_screen.c
parent8c655f499cf61211146a3d38f77532541f88aa88 (diff)
gallium: add PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
This is required for any serious constant buffer support. Constant buffer offsets on ATI and NVIDIA DX10 and DX11 GPUs must be a multiple of 256. In OpenGL, this can be queried via GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT.
Diffstat (limited to 'src/gallium/drivers/nvc0/nvc0_screen.c')
-rw-r--r--src/gallium/drivers/nvc0/nvc0_screen.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c
index 7e6c1d40913..366e6fbb832 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nvc0/nvc0_screen.c
@@ -144,6 +144,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_USER_INDEX_BUFFERS:
case PIPE_CAP_USER_CONSTANT_BUFFERS:
return 1;
+ case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
+ return 256;
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: