diff options
| author | Christoph Bumiller <[email protected]> | 2012-01-06 22:19:42 +0100 |
|---|---|---|
| committer | Christoph Bumiller <[email protected]> | 2012-01-10 00:36:46 +0100 |
| commit | 405bd00f3c98cb78d1dda1f3bf5d74155b18cd57 (patch) | |
| tree | c9008cb4f1c43ad430f807ff28ae808f3a2b9677 /src/gallium/drivers/nvc0/codegen | |
| parent | dc4c821f0817a3db716f965692fb701079f66340 (diff) | |
nvc0/ir: fix default insertion position in pre-SSA lowering pass
Always set position to insert before the current instruction,
the previous behaviour led to confusion (bug in checkPredicate
for BBs with only a single conditional branch).
Diffstat (limited to 'src/gallium/drivers/nvc0/codegen')
| -rw-r--r-- | src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp index 6faef9b68ca..e4d32d0a678 100644 --- a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp @@ -657,13 +657,7 @@ NVC0LoweringPass::checkPredicate(Instruction *insn) bool NVC0LoweringPass::visit(Instruction *i) { - if (i->prev) - bld.setPosition(i->prev, true); - else - if (i->next) - bld.setPosition(i->next, false); - else - bld.setPosition(i->bb, true); + bld.setPosition(i, false); if (i->cc != CC_ALWAYS) checkPredicate(i); |