diff options
| author | Ben Skeggs <[email protected]> | 2011-03-01 13:09:41 +1000 |
|---|---|---|
| committer | Ben Skeggs <[email protected]> | 2011-03-01 14:44:43 +1000 |
| commit | be68782d9aebf6f6575bb8cc9cfc66b7bad79644 (patch) | |
| tree | 3b0481a6a08f3577df8d3e32313bfabb214e5cad /src/gallium/drivers/nv50/nv50_tex.c | |
| parent | 79079141fa7cbf395d1ffc77364ac301d9824211 (diff) | |
nv50: sync textures with render targets ourselves
Port of the nvc0 commit doing the same.
Signed-off-by: Ben Skeggs <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nv50/nv50_tex.c')
| -rw-r--r-- | src/gallium/drivers/nv50/nv50_tex.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c index eaee0a1107f..a76139ad37e 100644 --- a/src/gallium/drivers/nv50/nv50_tex.c +++ b/src/gallium/drivers/nv50/nv50_tex.c @@ -212,9 +212,17 @@ nv50_validate_tic(struct nv50_context *nv50, int s) OUT_RINGp (chan, &tic->tic[3], 5); need_flush = TRUE; + } else + if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) { + BEGIN_RING(chan, RING_3D(TEX_CACHE_CTL), 1); + OUT_RING (chan, 0x20); //(tic->id << 4) | 1); } + nv50->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32); + res->status &= NOUVEAU_BUFFER_STATUS_GPU_WRITING; + res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING; + nv50_bufctx_add_resident(nv50, NV50_BUFCTX_TEXTURES, res, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |