summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/nv50/nv50_context.h
diff options
context:
space:
mode:
authorBen Skeggs <[email protected]>2009-01-12 14:10:24 +1000
committerBen Skeggs <[email protected]>2009-01-12 16:59:33 +1000
commit08b6534bc80925e4574d6b893f8aa14751b44a3f (patch)
treeb2c64aa081dc9ac22f59326639d08e31fbf56b4a /src/gallium/drivers/nv50/nv50_context.h
parent103020f2646e224a21dcd0dd27d71a10865c0d3d (diff)
nv50: any cpu access to a texture is done on its backing images
Still a little dodgy: - RTT will hit an assertion (hopefully!) and fail - 3D textures with depth >= 32 will cause bad things to happen
Diffstat (limited to 'src/gallium/drivers/nv50/nv50_context.h')
-rw-r--r--src/gallium/drivers/nv50/nv50_context.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h
index daa3efaa0a7..c1ff6061e4d 100644
--- a/src/gallium/drivers/nv50/nv50_context.h
+++ b/src/gallium/drivers/nv50/nv50_context.h
@@ -70,7 +70,8 @@ struct nv50_rasterizer_stateobj {
struct nv50_miptree_level {
struct pipe_buffer **image;
int *image_offset;
- unsigned image_dirty;
+ unsigned image_dirty_cpu;
+ unsigned image_dirty_gpu;
};
struct nv50_miptree {