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authorBen Skeggs <[email protected]>2008-02-29 23:08:01 +1100
committerBen Skeggs <[email protected]>2008-02-29 23:08:01 +1100
commit17f6db9d0197657cd753249ef60355c6fd983032 (patch)
tree62a00ab44eab8eb0ec43268a3d4143242cb008aa /src/gallium/drivers/nv40/nv40_context.h
parentbaaae562f02563c5966b857c61b3eae7341950e3 (diff)
nv40: move "channel context" stuff into nv40_screen
Diffstat (limited to 'src/gallium/drivers/nv40/nv40_context.h')
-rw-r--r--src/gallium/drivers/nv40/nv40_context.h29
1 files changed, 5 insertions, 24 deletions
diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h
index 3ddfbd43f60..3b669594dc3 100644
--- a/src/gallium/drivers/nv40/nv40_context.h
+++ b/src/gallium/drivers/nv40/nv40_context.h
@@ -11,7 +11,7 @@
#include "nouveau/nouveau_gldefs.h"
#define NOUVEAU_PUSH_CONTEXT(ctx) \
- struct nv40_channel_context *ctx = nv40->hw
+ struct nv40_screen *ctx = nv40->screen
#include "nouveau/nouveau_push.h"
#include "nouveau/nouveau_stateobj.h"
@@ -59,6 +59,8 @@ enum nv40_state_index {
NV40_STATE_MAX = 33
};
+#include "nv40_screen.h"
+
#define NV40_NEW_BLEND (1 << 0)
#define NV40_NEW_RAST (1 << 1)
#define NV40_NEW_ZSA (1 << 2)
@@ -76,28 +78,6 @@ enum nv40_state_index {
#define NV40_FALLBACK_TNL (1 << 0)
#define NV40_FALLBACK_RAST (1 << 1)
-struct nv40_channel_context {
- struct nouveau_winsys *nvws;
- unsigned refcount;
-
- unsigned chipset;
-
- /* HW graphics objects */
- struct nouveau_grobj *curie;
- struct nouveau_notifier *sync;
-
- /* Query object resources */
- struct nouveau_notifier *query;
- struct nouveau_resource *query_heap;
-
- /* Vtxprog resources */
- struct nouveau_resource *vp_exec_heap;
- struct nouveau_resource *vp_data_heap;
-
- /* Current 3D state of channel */
- struct nouveau_stateobj *state[NV40_STATE_MAX];
-};
-
struct nv40_rasterizer_state {
struct pipe_rasterizer_state pipe;
struct nouveau_stateobj *so;
@@ -125,9 +105,10 @@ struct nv40_state {
struct nv40_context {
struct pipe_context pipe;
+
struct nouveau_winsys *nvws;
+ struct nv40_screen *screen;
- struct nv40_channel_context *hw;
struct draw_context *draw;
int chipset;