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authorPatrice Mandin <[email protected]>2008-07-09 22:13:01 +0200
committerPatrice Mandin <[email protected]>2008-07-09 22:13:01 +0200
commit2fed964a27f208f69edc0b2d9a2d0b0717184ee5 (patch)
tree3f6ba00acaf0e902cb7fd580dbd102bde9a41a72 /src/gallium/drivers/nv30/nv30_fragtex.c
parent7a838ef411d2f4716bdcbcad9f593541c43a2ce7 (diff)
nv30: Update defines from nouveau_class.h
Diffstat (limited to 'src/gallium/drivers/nv30/nv30_fragtex.c')
-rw-r--r--src/gallium/drivers/nv30/nv30_fragtex.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c
index 47f3ff047db..92b3f939297 100644
--- a/src/gallium/drivers/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nv30/nv30_fragtex.c
@@ -87,6 +87,7 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
struct nv30_texture_format *tf;
uint32_t txf, txs, txp;
int swizzled = 0; /*XXX: implement in region code? */
+ unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
tf = nv30_fragtex_format(pt->format);
if (!tf || !tf->defined) {
@@ -99,20 +100,20 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
txf |= log2i(pt->width[0]) << 20;
txf |= log2i(pt->height[0]) << 24;
txf |= log2i(pt->depth[0]) << 28;
- txf |= 8;
+ txf |= NV34TCL_TX_FORMAT_NO_BORDER;
switch (pt->target) {
-/* case PIPE_TEXTURE_CUBE:
- txf |= NV34TCL_TEX_FORMAT_CUBIC;*/
+ case PIPE_TEXTURE_CUBE:
+ txf |= NV34TCL_TX_FORMAT_CUBIC;
/* fall-through */
case PIPE_TEXTURE_2D:
- txf |= (2<<4);
+ txf |= NV34TCL_TX_FORMAT_DIMS_2D;
break;
case PIPE_TEXTURE_3D:
- txf |= (3<<4);
+ txf |= NV34TCL_TX_FORMAT_DIMS_3D;
break;
case PIPE_TEXTURE_1D:
- txf |= (1<<4);
+ txf |= NV34TCL_TX_FORMAT_DIMS_1D;
break;
default:
NOUVEAU_ERR("Unknown target %d\n", pt->target);
@@ -122,13 +123,13 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
txs = tf->swizzle;
BEGIN_RING(rankine, NV34TCL_TX_OFFSET(unit), 8);
- OUT_RELOCl(nv30mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
- OUT_RELOCd(nv30mt->buffer,txf,NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_OR | NOUVEAU_BO_RD, 1/*VRAM*/,2/*TT*/);
+ OUT_RELOCl(nv30mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW);
+ OUT_RELOCd(nv30mt->buffer,txf, tex_flags | NOUVEAU_BO_RD, 1/*VRAM*/,2/*TT*/);
OUT_RING (ps->wrap);
- OUT_RING (0x40000000); /* enable */
+ OUT_RING (NV34TCL_TX_ENABLE_ENABLE | ps->en);
OUT_RING (txs);
OUT_RING (ps->filt | 0x2000 /* magic */);
- OUT_RING ((pt->width[0] << 16) | pt->height[0]);
+ OUT_RING ((pt->width[0] << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | pt->height[0]);
OUT_RING (ps->bcol);
}