diff options
author | Marek Olšák <[email protected]> | 2017-04-02 16:24:39 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-05-10 19:00:16 +0200 |
commit | 330d0607ed60fd3edca192e54b4246310f06652f (patch) | |
tree | 56bceba5b291ffcf42209ef1ab7ec515a8f5b666 /src/gallium/drivers/nouveau | |
parent | 22f6624ed318e8131681ec1f2e7b3a59449df412 (diff) |
gallium: remove pipe_index_buffer and set_index_buffer
pipe_draw_info::indexed is replaced with index_size. index_size == 0 means
non-indexed.
Instead of pipe_index_buffer::offset, pipe_draw_info::start is used.
For indexed indirect draws, pipe_draw_info::start is added to the indirect
start. This is the only case when "start" affects indirect draws.
pipe_draw_info::index is a union. Use either index::resource or
index::user depending on the value of pipe_draw_info::has_user_indices.
v2: fixes for nine, svga
Diffstat (limited to 'src/gallium/drivers/nouveau')
18 files changed, 107 insertions, 209 deletions
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_context.c b/src/gallium/drivers/nouveau/nv30/nv30_context.c index cec3cd06b58..e137525c2b8 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_context.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_context.c @@ -123,13 +123,6 @@ nv30_invalidate_resource_storage(struct nouveau_context *nv, } } } - if (res->bind & PIPE_BIND_INDEX_BUFFER) { - if (nv30->idxbuf.buffer == res) { - nouveau_bufctx_reset(nv30->bufctx, BUFCTX_IDXBUF); - if (!--ref) - return ref; - } - } if (res->bind & PIPE_BIND_SAMPLER_VIEW) { for (i = 0; i < nv30->fragprog.num_textures; ++i) { diff --git a/src/gallium/drivers/nouveau/nv30/nv30_context.h b/src/gallium/drivers/nouveau/nv30/nv30_context.h index 0ab2f95bc20..1496b3760dd 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_context.h +++ b/src/gallium/drivers/nouveau/nv30/nv30_context.h @@ -110,7 +110,6 @@ struct nv30_context { struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; unsigned num_vtxbufs; - struct pipe_index_buffer idxbuf; uint32_t vbo_fifo; uint32_t vbo_user; unsigned vbo_min_index; diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c index 28d3de932ff..4c587fca75d 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c @@ -430,15 +430,15 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) draw_set_mapped_vertex_buffer(draw, i, map, ~0); } - if (info->indexed) { - const void *map = nv30->idxbuf.user_buffer; + if (info->index_size) { + const void *map = info->has_user_indices ? info->index.user : NULL; if (!map) - map = pipe_buffer_map(pipe, nv30->idxbuf.buffer, + map = pipe_buffer_map(pipe, info->index.resource, PIPE_TRANSFER_UNSYNCHRONIZED | PIPE_TRANSFER_READ, &transferi); draw_set_indexes(draw, - (ubyte *) map + nv30->idxbuf.offset, - nv30->idxbuf.index_size, ~0); + (ubyte *) map, + info->index_size, ~0); } else { draw_set_indexes(draw, NULL, 0, 0); } @@ -446,7 +446,7 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) draw_vbo(draw, info); draw_flush(draw); - if (info->indexed && transferi) + if (info->index_size && transferi) pipe_buffer_unmap(pipe, transferi); for (i = 0; i < nv30->num_vtxbufs; i++) if (transfer[i]) diff --git a/src/gallium/drivers/nouveau/nv30/nv30_push.c b/src/gallium/drivers/nouveau/nv30/nv30_push.c index 90adfa06799..fc8520b8952 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_push.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_push.c @@ -199,7 +199,7 @@ nv30_push_vbo(struct nv30_context *nv30, const struct pipe_draw_info *info) { struct push_context ctx; unsigned i, index_size; - bool apply_bias = info->indexed && info->index_bias; + bool apply_bias = info->index_size && info->index_bias; ctx.push = nv30->base.pushbuf; ctx.translate = nv30->vertex->translate; @@ -224,18 +224,18 @@ nv30_push_vbo(struct nv30_context *nv30, const struct pipe_draw_info *info) ctx.translate->set_buffer(ctx.translate, i, data, vb->stride, ~0); } - if (info->indexed) { - if (nv30->idxbuf.buffer) + if (info->index_size) { + if (!info->has_user_indices) ctx.idxbuf = nouveau_resource_map_offset(&nv30->base, - nv04_resource(nv30->idxbuf.buffer), nv30->idxbuf.offset, + nv04_resource(info->index.resource), info->start * info->index_size, NOUVEAU_BO_RD); else - ctx.idxbuf = nv30->idxbuf.user_buffer; + ctx.idxbuf = info->index.user; if (!ctx.idxbuf) { nv30_state_release(nv30); return; } - index_size = nv30->idxbuf.index_size; + index_size = info->index_size; ctx.primitive_restart = info->primitive_restart; ctx.restart_index = info->restart_index; } else { @@ -277,8 +277,8 @@ nv30_push_vbo(struct nv30_context *nv30, const struct pipe_draw_info *info) BEGIN_NV04(ctx.push, NV30_3D(VERTEX_BEGIN_END), 1); PUSH_DATA (ctx.push, NV30_3D_VERTEX_BEGIN_END_STOP); - if (info->indexed) - nouveau_resource_unmap(nv04_resource(nv30->idxbuf.buffer)); + if (info->index_size && !info->has_user_indices) + nouveau_resource_unmap(nv04_resource(info->index.resource)); for (i = 0; i < nv30->num_vtxbufs; ++i) { if (nv30->vtxbuf[i].buffer.resource) { diff --git a/src/gallium/drivers/nouveau/nv30/nv30_resource.c b/src/gallium/drivers/nouveau/nv30/nv30_resource.c index d5842dd8a4e..ff34f6e5f9f 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_resource.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_resource.c @@ -44,10 +44,6 @@ nv30_memory_barrier(struct pipe_context *pipe, unsigned flags) if (nv30->vtxbuf[i].buffer.resource->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) nv30->base.vbo_dirty = true; } - - if (nv30->idxbuf.buffer && - nv30->idxbuf.buffer->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) - nv30->base.vbo_dirty = true; } } diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state.c b/src/gallium/drivers/nouveau/nv30/nv30_state.c index 16b668bfe48..2a812252c98 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_state.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_state.c @@ -438,23 +438,6 @@ nv30_set_vertex_buffers(struct pipe_context *pipe, nv30->dirty |= NV30_NEW_ARRAYS; } -static void -nv30_set_index_buffer(struct pipe_context *pipe, - const struct pipe_index_buffer *ib) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - if (ib) { - pipe_resource_reference(&nv30->idxbuf.buffer, ib->buffer); - nv30->idxbuf.index_size = ib->index_size; - nv30->idxbuf.offset = ib->offset; - nv30->idxbuf.user_buffer = ib->user_buffer; - } else { - pipe_resource_reference(&nv30->idxbuf.buffer, NULL); - nv30->idxbuf.user_buffer = NULL; - } -} - void nv30_state_init(struct pipe_context *pipe) { @@ -481,5 +464,4 @@ nv30_state_init(struct pipe_context *pipe) pipe->set_viewport_states = nv30_set_viewport_states; pipe->set_vertex_buffers = nv30_set_vertex_buffers; - pipe->set_index_buffer = nv30_set_index_buffer; } diff --git a/src/gallium/drivers/nouveau/nv30/nv30_vbo.c b/src/gallium/drivers/nouveau/nv30/nv30_vbo.c index d049b55a90f..bb0a8a0b1d5 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_vbo.c @@ -459,10 +459,11 @@ nv30_draw_elements_inline_u32_short(struct nouveau_pushbuf *push, static void nv30_draw_elements(struct nv30_context *nv30, bool shorten, + const struct pipe_draw_info *info, unsigned mode, unsigned start, unsigned count, - unsigned instance_count, int32_t index_bias) + unsigned instance_count, int32_t index_bias, + unsigned index_size) { - const unsigned index_size = nv30->idxbuf.index_size; struct nouveau_pushbuf *push = nv30->base.pushbuf; struct nouveau_object *eng3d = nv30->screen->eng3d; unsigned prim = nv30_prim_gl(mode); @@ -474,9 +475,9 @@ nv30_draw_elements(struct nv30_context *nv30, bool shorten, } if (eng3d->oclass == NV40_3D_CLASS && index_size > 1 && - nv30->idxbuf.buffer) { - struct nv04_resource *res = nv04_resource(nv30->idxbuf.buffer); - unsigned offset = nv30->idxbuf.offset; + !info->has_user_indices) { + struct nv04_resource *res = nv04_resource(info->index.resource); + unsigned offset = 0; assert(nouveau_resource_mapped_by_gpu(&res->base)); @@ -511,12 +512,12 @@ nv30_draw_elements(struct nv30_context *nv30, bool shorten, PUSH_RESET(push, BUFCTX_IDXBUF); } else { const void *data; - if (nv30->idxbuf.buffer) + if (!info->has_user_indices) data = nouveau_resource_map_offset(&nv30->base, - nv04_resource(nv30->idxbuf.buffer), - nv30->idxbuf.offset, NOUVEAU_BO_RD); + nv04_resource(info->index.resource), + start * index_size, NOUVEAU_BO_RD); else - data = nv30->idxbuf.user_buffer; + data = info->index.user; if (!data) return; @@ -559,7 +560,7 @@ nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) * if index count is larger and we expect repeated vertices, suggest upload. */ nv30->vbo_push_hint = /* the 64 is heuristic */ - !(info->indexed && + !(info->index_size && ((info->max_index - info->min_index + 64) < info->count)); nv30->vbo_min_index = info->min_index; @@ -589,8 +590,8 @@ nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) nv30->base.vbo_dirty = true; } - if (!nv30->base.vbo_dirty && nv30->idxbuf.buffer && - nv30->idxbuf.buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) + if (!nv30->base.vbo_dirty && info->index_size && !info->has_user_indices && + info->index.resource->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) nv30->base.vbo_dirty = true; if (nv30->base.vbo_dirty) { @@ -599,7 +600,7 @@ nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) nv30->base.vbo_dirty = false; } - if (!info->indexed) { + if (!info->index_size) { nv30_draw_arrays(nv30, info->mode, info->start, info->count, info->instance_count); @@ -628,9 +629,9 @@ nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) shorten = false; } - nv30_draw_elements(nv30, shorten, + nv30_draw_elements(nv30, shorten, info, info->mode, info->start, info->count, - info->instance_count, info->index_bias); + info->instance_count, info->index_bias, info->index_size); } nv30_state_release(nv30); diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c b/src/gallium/drivers/nouveau/nv50/nv50_context.c index d0729276e1d..d2c37ac276d 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_context.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_context.c @@ -68,10 +68,6 @@ nv50_memory_barrier(struct pipe_context *pipe, unsigned flags) nv50->base.vbo_dirty = true; } - if (nv50->idxbuf.buffer && - nv50->idxbuf.buffer->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) - nv50->base.vbo_dirty = true; - for (s = 0; s < 3 && !nv50->cb_dirty; ++s) { uint32_t valid = nv50->constbuf_valid[s]; @@ -146,8 +142,6 @@ nv50_context_unreference_resources(struct nv50_context *nv50) for (i = 0; i < nv50->num_vtxbufs; ++i) pipe_resource_reference(&nv50->vtxbuf[i].buffer.resource, NULL); - pipe_resource_reference(&nv50->idxbuf.buffer, NULL); - for (s = 0; s < 3; ++s) { assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS); for (i = 0; i < nv50->num_textures[s]; ++i) @@ -238,14 +232,6 @@ nv50_invalidate_resource_storage(struct nouveau_context *ctx, } } - if (nv50->idxbuf.buffer == res) { - /* Just rebind to the bufctx as there is no separate dirty bit */ - nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_INDEX); - BCTX_REFN(nv50->bufctx_3d, 3D_INDEX, nv04_resource(res), RD); - if (!--ref) - return ref; - } - for (s = 0; s < 3; ++s) { assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS); for (i = 0; i < nv50->num_textures[s]; ++i) { diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h b/src/gallium/drivers/nouveau/nv50/nv50_context.h index cca44f5bb21..224535a9381 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_context.h +++ b/src/gallium/drivers/nouveau/nv50/nv50_context.h @@ -143,7 +143,6 @@ struct nv50_context { struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; unsigned num_vtxbufs; uint32_t vtxbufs_coherent; - struct pipe_index_buffer idxbuf; uint32_t vbo_fifo; /* bitmask of vertex elements to be pushed to FIFO */ uint32_t vbo_user; /* bitmask of vertex buffers pointing to user memory */ uint32_t vbo_constant; /* bitmask of user buffers with stride 0 */ diff --git a/src/gallium/drivers/nouveau/nv50/nv50_push.c b/src/gallium/drivers/nouveau/nv50/nv50_push.c index d3419012e98..9ee9a8eed19 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_push.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_push.c @@ -244,7 +244,7 @@ nv50_push_vbo(struct nv50_context *nv50, const struct pipe_draw_info *info) unsigned i, index_size; unsigned inst_count = info->instance_count; unsigned vert_count = info->count; - bool apply_bias = info->indexed && info->index_bias; + bool apply_bias = info->index_size && info->index_bias; ctx.push = nv50->base.pushbuf; ctx.translate = nv50->vertex->translate; @@ -276,17 +276,17 @@ nv50_push_vbo(struct nv50_context *nv50, const struct pipe_draw_info *info) ctx.translate->set_buffer(ctx.translate, i, data, vb->stride, ~0); } - if (info->indexed) { - if (nv50->idxbuf.buffer) { + if (info->index_size) { + if (!info->has_user_indices) { ctx.idxbuf = nouveau_resource_map_offset(&nv50->base, - nv04_resource(nv50->idxbuf.buffer), nv50->idxbuf.offset, + nv04_resource(info->index.resource), info->start * info->index_size, NOUVEAU_BO_RD); } else { - ctx.idxbuf = nv50->idxbuf.user_buffer; + ctx.idxbuf = info->index.user; } if (!ctx.idxbuf) return; - index_size = nv50->idxbuf.index_size; + index_size = info->index_size; ctx.primitive_restart = info->primitive_restart; ctx.restart_index = info->restart_index; } else { diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c b/src/gallium/drivers/nouveau/nv50/nv50_state.c index d5af6c9d1ff..a7d86b0f90c 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_state.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c @@ -1081,29 +1081,6 @@ nv50_set_vertex_buffers(struct pipe_context *pipe, } static void -nv50_set_index_buffer(struct pipe_context *pipe, - const struct pipe_index_buffer *ib) -{ - struct nv50_context *nv50 = nv50_context(pipe); - - if (nv50->idxbuf.buffer) - nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_INDEX); - - if (ib) { - pipe_resource_reference(&nv50->idxbuf.buffer, ib->buffer); - nv50->idxbuf.index_size = ib->index_size; - if (ib->buffer) { - nv50->idxbuf.offset = ib->offset; - BCTX_REFN(nv50->bufctx_3d, 3D_INDEX, nv04_resource(ib->buffer), RD); - } else { - nv50->idxbuf.user_buffer = ib->user_buffer; - } - } else { - pipe_resource_reference(&nv50->idxbuf.buffer, NULL); - } -} - -static void nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso) { struct nv50_context *nv50 = nv50_context(pipe); @@ -1341,7 +1318,6 @@ nv50_init_state_functions(struct nv50_context *nv50) pipe->bind_vertex_elements_state = nv50_vertex_state_bind; pipe->set_vertex_buffers = nv50_set_vertex_buffers; - pipe->set_index_buffer = nv50_set_index_buffer; pipe->create_stream_output_target = nv50_so_target_create; pipe->stream_output_target_destroy = nv50_so_target_destroy; diff --git a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c index 60970d7603e..37dca97c870 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c @@ -595,12 +595,13 @@ nv50_draw_elements_inline_u32_short(struct nouveau_pushbuf *push, static void nv50_draw_elements(struct nv50_context *nv50, bool shorten, + const struct pipe_draw_info *info, unsigned mode, unsigned start, unsigned count, - unsigned instance_count, int32_t index_bias) + unsigned instance_count, int32_t index_bias, + unsigned index_size) { struct nouveau_pushbuf *push = nv50->base.pushbuf; unsigned prim; - const unsigned index_size = nv50->idxbuf.index_size; prim = nv50_prim_gl(mode); @@ -614,15 +615,15 @@ nv50_draw_elements(struct nv50_context *nv50, bool shorten, nv50->state.index_bias = index_bias; } - if (nv50->idxbuf.buffer) { - struct nv04_resource *buf = nv04_resource(nv50->idxbuf.buffer); + if (!info->has_user_indices) { + struct nv04_resource *buf = nv04_resource(info->index.resource); unsigned pb_start; unsigned pb_bytes; - const unsigned base = (buf->offset + nv50->idxbuf.offset) & ~3; + const unsigned base = buf->offset & ~3; - start += ((buf->offset + nv50->idxbuf.offset) & 3) >> (index_size >> 1); + start += (buf->offset & 3) >> (index_size >> 1); - assert(nouveau_resource_mapped_by_gpu(nv50->idxbuf.buffer)); + assert(nouveau_resource_mapped_by_gpu(info->index.resource)); /* This shouldn't have to be here. The going theory is that the buffer * is being filled in by PGRAPH, and it's not done yet by the time it @@ -675,7 +676,7 @@ nv50_draw_elements(struct nv50_context *nv50, bool shorten, prim |= NV50_3D_VERTEX_BEGIN_GL_INSTANCE_NEXT; } } else { - const void *data = nv50->idxbuf.user_buffer; + const void *data = info->index.user; while (instance_count--) { BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1); @@ -769,6 +770,11 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) bool tex_dirty = false; int s; + if (info->index_size && !info->has_user_indices) { + nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_INDEX); + BCTX_REFN(nv50->bufctx_3d, 3D_INDEX, nv04_resource(info->index.resource), RD); + } + /* NOTE: caller must ensure that (min_index + index_bias) is >= 0 */ nv50->vb_elt_first = info->min_index + info->index_bias; nv50->vb_elt_limit = info->max_index - info->min_index; @@ -779,7 +785,7 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) * if index count is larger and we expect repeated vertices, suggest upload. */ nv50->vbo_push_hint = /* the 64 is heuristic */ - !(info->indexed && ((nv50->vb_elt_limit + 64) < info->count)); + !(info->index_size && ((nv50->vb_elt_limit + 64) < info->count)); if (nv50->vbo_user && !(nv50->dirty_3d & (NV50_NEW_3D_ARRAYS | NV50_NEW_3D_VERTEX))) { if (!!nv50->vbo_fifo != nv50->vbo_push_hint) @@ -853,7 +859,7 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) nv50->base.vbo_dirty = false; } - if (info->indexed) { + if (info->index_size) { bool shorten = info->max_index <= 65535; if (info->primitive_restart != nv50->state.prim_restart) { @@ -878,9 +884,9 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) shorten = false; } - nv50_draw_elements(nv50, shorten, + nv50_draw_elements(nv50, shorten, info, info->mode, info->start, info->count, - info->instance_count, info->index_bias); + info->instance_count, info->index_bias, info->index_size); } else if (unlikely(info->count_from_stream_output)) { nva0_draw_stream_output(nv50, info); diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c index ef61256816a..59edd3d7e6e 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c @@ -68,10 +68,6 @@ nvc0_memory_barrier(struct pipe_context *pipe, unsigned flags) nvc0->base.vbo_dirty = true; } - if (nvc0->idxbuf.buffer && - nvc0->idxbuf.buffer->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) - nvc0->base.vbo_dirty = true; - for (s = 0; s < 5 && !nvc0->cb_dirty; ++s) { uint32_t valid = nvc0->constbuf_valid[s]; @@ -149,8 +145,6 @@ nvc0_context_unreference_resources(struct nvc0_context *nvc0) for (i = 0; i < nvc0->num_vtxbufs; ++i) pipe_vertex_buffer_unreference(&nvc0->vtxbuf[i]); - pipe_resource_reference(&nvc0->idxbuf.buffer, NULL); - for (s = 0; s < 6; ++s) { for (i = 0; i < nvc0->num_textures[s]; ++i) pipe_sampler_view_reference(&nvc0->textures[s][i], NULL); @@ -268,13 +262,6 @@ nvc0_invalidate_resource_storage(struct nouveau_context *ctx, } } - if (nvc0->idxbuf.buffer == res) { - nvc0->dirty_3d |= NVC0_NEW_3D_IDXBUF; - nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_IDX); - if (!--ref) - return ref; - } - for (s = 0; s < 6; ++s) { for (i = 0; i < nvc0->num_textures[s]; ++i) { if (nvc0->textures[s][i] && diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h index bd6f75238e5..6f631b993c0 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h @@ -53,7 +53,7 @@ #define NVC0_NEW_3D_TEXTURES (1 << 19) #define NVC0_NEW_3D_SAMPLERS (1 << 20) #define NVC0_NEW_3D_TFB_TARGETS (1 << 21) -#define NVC0_NEW_3D_IDXBUF (1 << 22) + #define NVC0_NEW_3D_SURFACES (1 << 23) #define NVC0_NEW_3D_MIN_SAMPLES (1 << 24) #define NVC0_NEW_3D_TESSFACTOR (1 << 25) @@ -193,7 +193,6 @@ struct nvc0_context { struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; unsigned num_vtxbufs; uint32_t vtxbufs_coherent; - struct pipe_index_buffer idxbuf; uint32_t constant_vbos; uint32_t vbo_user; /* bitmask of vertex buffers pointing to user memory */ uint32_t vb_elt_first; /* from pipe_draw_info, for vertex upload */ diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c index bf33746802c..99d45a238ae 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c @@ -962,31 +962,6 @@ nvc0_set_vertex_buffers(struct pipe_context *pipe, } static void -nvc0_set_index_buffer(struct pipe_context *pipe, - const struct pipe_index_buffer *ib) -{ - struct nvc0_context *nvc0 = nvc0_context(pipe); - - if (nvc0->idxbuf.buffer) - nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_IDX); - - if (ib) { - pipe_resource_reference(&nvc0->idxbuf.buffer, ib->buffer); - nvc0->idxbuf.index_size = ib->index_size; - if (ib->buffer) { - nvc0->idxbuf.offset = ib->offset; - nvc0->dirty_3d |= NVC0_NEW_3D_IDXBUF; - } else { - nvc0->idxbuf.user_buffer = ib->user_buffer; - nvc0->dirty_3d &= ~NVC0_NEW_3D_IDXBUF; - } - } else { - nvc0->dirty_3d &= ~NVC0_NEW_3D_IDXBUF; - pipe_resource_reference(&nvc0->idxbuf.buffer, NULL); - } -} - -static void nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso) { struct nvc0_context *nvc0 = nvc0_context(pipe); @@ -1426,7 +1401,6 @@ nvc0_init_state_functions(struct nvc0_context *nvc0) pipe->bind_vertex_elements_state = nvc0_vertex_state_bind; pipe->set_vertex_buffers = nvc0_set_vertex_buffers; - pipe->set_index_buffer = nvc0_set_index_buffer; pipe->create_stream_output_target = nvc0_so_target_create; pipe->stream_output_target_destroy = nvc0_so_target_destroy; diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c index 6d3caa116ae..37a67619588 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c @@ -819,8 +819,6 @@ nvc0_switch_pipe_context(struct nvc0_context *ctx_to) if (!ctx_to->vertex) ctx_to->dirty_3d &= ~(NVC0_NEW_3D_VERTEX | NVC0_NEW_3D_ARRAYS); - if (!ctx_to->idxbuf.buffer) - ctx_to->dirty_3d &= ~NVC0_NEW_3D_IDXBUF; if (!ctx_to->vertprog) ctx_to->dirty_3d &= ~NVC0_NEW_3D_VERTPROG; @@ -876,7 +874,6 @@ validate_list_3d[] = { { nvc0_vertex_arrays_validate, NVC0_NEW_3D_VERTEX | NVC0_NEW_3D_ARRAYS }, { nvc0_validate_surfaces, NVC0_NEW_3D_SURFACES }, { nvc0_validate_buffers, NVC0_NEW_3D_BUFFERS }, - { nvc0_idxbuf_validate, NVC0_NEW_3D_IDXBUF }, { nvc0_tfb_validate, NVC0_NEW_3D_TFB_TARGETS | NVC0_NEW_3D_GMTYPROG }, { nvc0_layer_validate, NVC0_NEW_3D_VERTPROG | NVC0_NEW_3D_TEVLPROG | diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c index 7cea5fb692e..86c5e8bf955 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c @@ -522,26 +522,6 @@ nvc0_vertex_arrays_validate(struct nvc0_context *nvc0) nvc0_validate_vertex_buffers(nvc0); } -void -nvc0_idxbuf_validate(struct nvc0_context *nvc0) -{ - struct nouveau_pushbuf *push = nvc0->base.pushbuf; - struct nv04_resource *buf = nv04_resource(nvc0->idxbuf.buffer); - - assert(buf); - assert(nouveau_resource_mapped_by_gpu(&buf->base)); - - PUSH_SPACE(push, 6); - BEGIN_NVC0(push, NVC0_3D(INDEX_ARRAY_START_HIGH), 5); - PUSH_DATAh(push, buf->address + nvc0->idxbuf.offset); - PUSH_DATA (push, buf->address + nvc0->idxbuf.offset); - PUSH_DATAh(push, buf->address + buf->base.width0 - 1); - PUSH_DATA (push, buf->address + buf->base.width0 - 1); - PUSH_DATA (push, nvc0->idxbuf.index_size >> 1); - - BCTX_REFN(nvc0->bufctx_3d, 3D_IDX, buf, RD); -} - #define NVC0_PRIM_GL_CASE(n) \ case PIPE_PRIM_##n: return NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_##n @@ -588,7 +568,7 @@ nvc0_draw_arrays(struct nvc0_context *nvc0, unsigned prim; if (nvc0->state.index_bias) { - /* index_bias is implied 0 if !info->indexed (really ?) */ + /* index_bias is implied 0 if !info->index_size (really ?) */ /* TODO: can we deactivate it for the VERTEX_BUFFER_FIRST command ? */ PUSH_SPACE(push, 2); IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0); @@ -711,12 +691,13 @@ nvc0_draw_elements_inline_u32_short(struct nouveau_pushbuf *push, static void nvc0_draw_elements(struct nvc0_context *nvc0, bool shorten, + const struct pipe_draw_info *info, unsigned mode, unsigned start, unsigned count, - unsigned instance_count, int32_t index_bias) + unsigned instance_count, int32_t index_bias, + unsigned index_size) { struct nouveau_pushbuf *push = nvc0->base.pushbuf; unsigned prim; - const unsigned index_size = nvc0->idxbuf.index_size; prim = nvc0_prim_gl(mode); @@ -729,7 +710,7 @@ nvc0_draw_elements(struct nvc0_context *nvc0, bool shorten, nvc0->state.index_bias = index_bias; } - if (nvc0->idxbuf.buffer) { + if (!info->has_user_indices) { PUSH_SPACE(push, 1); IMMED_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL), prim); do { @@ -745,7 +726,7 @@ nvc0_draw_elements(struct nvc0_context *nvc0, bool shorten, } while (instance_count); IMMED_NVC0(push, NVC0_3D(VERTEX_END_GL), 0); } else { - const void *data = nvc0->idxbuf.user_buffer; + const void *data = info->index.user; while (instance_count--) { PUSH_SPACE(push, 2); @@ -841,9 +822,9 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info) BEGIN_NVC0(push, NVC0_3D(CB_POS), 1); PUSH_DATA (push, NVC0_CB_AUX_DRAW_INFO); - if (info->indexed) { - assert(nvc0->idxbuf.buffer); - assert(nouveau_resource_mapped_by_gpu(nvc0->idxbuf.buffer)); + if (info->index_size) { + assert(!info->has_user_indices); + assert(nouveau_resource_mapped_by_gpu(info->index.resource)); size = 5; if (buf_count) macro = NVC0_3D_MACRO_DRAW_ELEMENTS_INDIRECT_COUNT; @@ -851,7 +832,7 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info) macro = NVC0_3D_MACRO_DRAW_ELEMENTS_INDIRECT; } else { if (nvc0->state.index_bias) { - /* index_bias is implied 0 if !info->indexed (really ?) */ + /* index_bias is implied 0 if !info->index_size (really ?) */ IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0); IMMED_NVC0(push, NVC0_3D(VERTEX_ID_BASE), 0); nvc0->state.index_bias = 0; @@ -940,6 +921,9 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) struct nvc0_screen *screen = nvc0->screen; int s; + if (info->index_size) + nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_IDX); + /* NOTE: caller must ensure that (min_index + index_bias) is >= 0 */ nvc0->vb_elt_first = info->min_index + info->index_bias; nvc0->vb_elt_limit = info->max_index - info->min_index; @@ -950,7 +934,7 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) * if index count is larger and we expect repeated vertices, suggest upload. */ nvc0->vbo_push_hint = - !info->indirect && info->indexed && + !info->indirect && info->index_size && (nvc0->vb_elt_limit >= (info->count * 2)); /* Check whether we want to switch vertex-submission mode. */ @@ -974,6 +958,23 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) IMMED_NVC0(push, NVC0_3D(PATCH_VERTICES), nvc0->state.patch_vertices); } + if (info->index_size && !info->has_user_indices) { + struct nv04_resource *buf = nv04_resource(info->index.resource); + + assert(buf); + assert(nouveau_resource_mapped_by_gpu(&buf->base)); + + PUSH_SPACE(push, 6); + BEGIN_NVC0(push, NVC0_3D(INDEX_ARRAY_START_HIGH), 5); + PUSH_DATAh(push, buf->address); + PUSH_DATA (push, buf->address); + PUSH_DATAh(push, buf->address + buf->base.width0 - 1); + PUSH_DATA (push, buf->address + buf->base.width0 - 1); + PUSH_DATA (push, info->index_size >> 1); + + BCTX_REFN(nvc0->bufctx_3d, 3D_IDX, buf, RD); + } + nvc0_state_validate_3d(nvc0, ~0); if (nvc0->vertprog->vp.need_draw_parameters && !info->indirect) { @@ -1046,8 +1047,8 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) nvc0->base.vbo_dirty |= !!nvc0->vtxbufs_coherent; - if (!nvc0->base.vbo_dirty && nvc0->idxbuf.buffer && - nvc0->idxbuf.buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) + if (!nvc0->base.vbo_dirty && info->index_size && !info->has_user_indices && + info->index.resource->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) nvc0->base.vbo_dirty = true; nvc0_update_prim_restart(nvc0, info->primitive_restart, info->restart_index); @@ -1064,15 +1065,15 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) if (unlikely(info->count_from_stream_output)) { nvc0_draw_stream_output(nvc0, info); } else - if (info->indexed) { + if (info->index_size) { bool shorten = info->max_index <= 65535; if (info->primitive_restart && info->restart_index > 65535) shorten = false; - nvc0_draw_elements(nvc0, shorten, + nvc0_draw_elements(nvc0, shorten, info, info->mode, info->start, info->count, - info->instance_count, info->index_bias); + info->instance_count, info->index_bias, info->index_size); } else { nvc0_draw_arrays(nvc0, info->mode, info->start, info->count, diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c index e4ccac88c14..f05618f6596 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c @@ -83,14 +83,16 @@ nvc0_vertex_configure_translate(struct nvc0_context *nvc0, int32_t index_bias) } static inline void -nvc0_push_map_idxbuf(struct push_context *ctx, struct nvc0_context *nvc0) +nvc0_push_map_idxbuf(struct push_context *ctx, struct nvc0_context *nvc0, + const struct pipe_draw_info *info, + unsigned offset) { - if (nvc0->idxbuf.buffer) { - struct nv04_resource *buf = nv04_resource(nvc0->idxbuf.buffer); + if (!info->has_user_indices) { + struct nv04_resource *buf = nv04_resource(info->index.resource); ctx->idxbuf = nouveau_resource_map_offset(&nvc0->base, - buf, nvc0->idxbuf.offset, NOUVEAU_BO_RD); + buf, offset, NOUVEAU_BO_RD); } else { - ctx->idxbuf = nvc0->idxbuf.user_buffer; + ctx->idxbuf = info->index.user; } } @@ -499,16 +501,16 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info) */ BEGIN_NVC0(ctx.push, NVC0_3D(PRIM_RESTART_ENABLE), 2); PUSH_DATA (ctx.push, 1); - PUSH_DATA (ctx.push, info->indexed ? 0xffffffff : info->restart_index); + PUSH_DATA (ctx.push, info->index_size ? 0xffffffff : info->restart_index); } else if (nvc0->state.prim_restart) { IMMED_NVC0(ctx.push, NVC0_3D(PRIM_RESTART_ENABLE), 0); } nvc0->state.prim_restart = info->primitive_restart; - if (info->indexed) { - nvc0_push_map_idxbuf(&ctx, nvc0); - index_size = nvc0->idxbuf.index_size; + if (info->index_size) { + nvc0_push_map_idxbuf(&ctx, nvc0, info, info->start * info->index_size); + index_size = info->index_size; } else { if (unlikely(info->count_from_stream_output)) { struct pipe_context *pipe = &nvc0->base.pipe; @@ -583,8 +585,8 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info) IMMED_NVC0(ctx.push, NVC0_3D(VERTEX_ARRAY_FETCH(1)), 0); } - if (info->indexed) - nouveau_resource_unmap(nv04_resource(nvc0->idxbuf.buffer)); + if (info->index_size && !info->has_user_indices) + nouveau_resource_unmap(nv04_resource(info->index.resource)); for (i = 0; i < nvc0->num_vtxbufs; ++i) nouveau_resource_unmap(nv04_resource(nvc0->vtxbuf[i].buffer.resource)); @@ -626,7 +628,7 @@ nvc0_push_upload_vertex_ids(struct push_context *ctx, uint64_t va; uint32_t *data; uint32_t format; - unsigned index_size = nvc0->idxbuf.index_size; + unsigned index_size = info->index_size; unsigned i; unsigned a = nvc0->vertex->num_elements; @@ -639,11 +641,11 @@ nvc0_push_upload_vertex_ids(struct push_context *ctx, bo); nouveau_pushbuf_validate(push); - if (info->indexed) { + if (info->index_size) { if (!info->index_bias) { memcpy(data, ctx->idxbuf, info->count * index_size); } else { - switch (nvc0->idxbuf.index_size) { + switch (info->index_size) { case 1: copy_indices_u8(data, ctx->idxbuf, info->index_bias, info->count); break; |