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authorIlia Mirkin <[email protected]>2015-12-01 15:01:11 -0500
committerIlia Mirkin <[email protected]>2015-12-02 18:51:15 -0500
commit52a800a687ee68483fe7cd83b137630b74e2127b (patch)
tree6fa898797b2099afc3b868ed89eeb415b07df4ea /src/gallium/drivers/nouveau
parent043d4275388ddb5d45f52344a2e3a5e366c91f19 (diff)
nv50/ir: allow immediate 0 to be loaded anywhere
There's a post-RA fixup to replace 0's with $r63 (or $r127 if too many regs are used), so just as nvc0, let an immediate 0 be loaded anywhere. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 94cf0f0e05e..a0fb14444d2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -268,6 +268,12 @@ TargetNV50::insnCanLoad(const Instruction *i, int s,
{
DataFile sf = ld->src(0).getFile();
+ // immediate 0 can be represented by GPR $r63/$r127
+ if (sf == FILE_IMMEDIATE && ld->getSrc(0)->reg.data.u64 == 0)
+ return (!i->isPseudo() &&
+ !i->asTex() &&
+ i->op != OP_EXPORT && i->op != OP_STORE);
+
if (sf == FILE_IMMEDIATE && (i->predSrc >= 0 || i->flagsDef >= 0))
return false;
if (s >= opInfo[i->op].srcNr)