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authorSamuel Pitoiset <[email protected]>2016-03-07 18:26:43 +0100
committerSamuel Pitoiset <[email protected]>2016-03-07 18:39:41 +0100
commit5777e87bed9de5db9ab08a1388265978507bc88e (patch)
tree77c8d7f8ca29f0fa69c5704306d807efe4d77543 /src/gallium/drivers/nouveau
parent3af78b426ee05f9515439c20fc416202bff4539c (diff)
nvc0/ir: make sure that thread count immediate for BAR fit
The limit of the thread count immediate value is 12 bits. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index 7bd7c732c49..8b9328b6296 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -1482,6 +1482,7 @@ CodeEmitterNVC0::emitBAR(const Instruction *i)
} else {
ImmediateValue *imm = i->getSrc(1)->asImm();
assert(imm);
+ assert(imm->reg.data.u32 <= 0xfff);
code[0] |= imm->reg.data.u32 << 26;
code[1] |= imm->reg.data.u32 >> 6;
code[1] |= 0x4000;