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authorSamuel Pitoiset <[email protected]>2016-04-27 19:14:59 +0200
committerSamuel Pitoiset <[email protected]>2016-05-21 18:32:56 +0200
commitb663db44ba35c5499265fcc629c66a1acbaca3f5 (patch)
tree521476d54d4573bb280d040e8ea8315002104e1a /src/gallium/drivers/nouveau
parentcd88d1a171bf4493ddd5590c8a294543f14f19d5 (diff)
nvc0/ir: add emission for SULDB and SUSTx
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp46
1 files changed, 44 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index f7bdc19cfdc..596293ed2df 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -139,6 +139,8 @@ private:
void emitSULDGB(const TexInstruction *);
void emitSUSTGx(const TexInstruction *);
+ void emitSULDB(const TexInstruction *);
+ void emitSUSTx(const TexInstruction *);
void emitSULEA(const TexInstruction *);
void emitVSHL(const Instruction *);
@@ -2340,6 +2342,46 @@ CodeEmitterNVC0::emitSULEA(const TexInstruction *i)
}
void
+CodeEmitterNVC0::emitSULDB(const TexInstruction *i)
+{
+ assert(targ->getChipset() < NVISA_GK104_CHIPSET);
+
+ code[0] = 0x5;
+ code[1] = 0xd4000000 | (i->subOp << 15);
+
+ emitPredicate(i);
+ emitLoadStoreType(i->dType);
+
+ defId(i->def(0), 14);
+
+ emitCachingMode(i->cache);
+ emitSUAddr(i);
+ emitSUDim(i);
+}
+
+void
+CodeEmitterNVC0::emitSUSTx(const TexInstruction *i)
+{
+ assert(targ->getChipset() < NVISA_GK104_CHIPSET);
+
+ code[0] = 0x5;
+ code[1] = 0xdc000000 | (i->subOp << 15);
+
+ if (i->op == OP_SUSTP)
+ code[1] |= i->tex.mask << 17;
+ else
+ emitLoadStoreType(i->dType);
+
+ emitPredicate(i);
+
+ srcId(i->src(1), 14);
+
+ emitCachingMode(i->cache);
+ emitSUAddr(i);
+ emitSUDim(i);
+}
+
+void
CodeEmitterNVC0::emitVectorSubOp(const Instruction *i)
{
switch (NV50_IR_SUBOP_Vn(i->subOp)) {
@@ -2625,14 +2667,14 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn)
if (targ->getChipset() >= NVISA_GK104_CHIPSET)
emitSULDGB(insn->asTex());
else
- ERROR("SULDB not yet supported on < nve4\n");
+ emitSULDB(insn->asTex());
break;
case OP_SUSTB:
case OP_SUSTP:
if (targ->getChipset() >= NVISA_GK104_CHIPSET)
emitSUSTGx(insn->asTex());
else
- ERROR("SUSTx not yet supported on < nve4\n");
+ emitSUSTx(insn->asTex());
break;
case OP_SULEA:
emitSULEA(insn->asTex());