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authorSamuel Pitoiset <[email protected]>2016-04-09 20:15:13 +0200
committerSamuel Pitoiset <[email protected]>2016-04-26 19:47:49 +0200
commitda8171dc7580db75d65e0f89e1c20ee45c3ef3e7 (patch)
tree78bdeed39894dd27a51a993c64759894492ee086 /src/gallium/drivers/nouveau/nvc0
parent285f2edd14f82538d27f4df76055a3f154da3b29 (diff)
nvc0: shift address with blocksize for image buffers
This fixes a bunch of dEQP image buffers related tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_tex.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 9fddc75cb3f..efeb4e387c1 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -859,6 +859,10 @@ nve4_set_surface_info(struct nouveau_pushbuf *push,
#endif
if (res->base.target == PIPE_BUFFER) {
+ unsigned blocksize = util_format_get_blocksize(view->format);
+
+ address += view->u.buf.first_element * blocksize;
+
info[0] = address >> 8;
info[2] = width - 1;
info[2] |= (0xff & nve4_su_format_aux_map[view->format]) << 22;