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authorBen Skeggs <[email protected]>2017-01-28 13:14:10 +1000
committerIlia Mirkin <[email protected]>2017-06-20 20:18:54 -0400
commit7bae3ef812f979f6bf6b84098d59ace3be7ca075 (patch)
treeb2838bb145f1add2d3f3e02c6b863ab2e0111b69 /src/gallium/drivers/nouveau/nvc0
parentec3d489d5b70686359030dcca542ff979cfd50ff (diff)
nvc0: fix transfer of larger rectangles with DmaCopy on gk104 and up
By treating the rectangles as 1cpp, we can run up against some internal copy engine limits and trigger a MEM2MEM_RECT_OUT_OF_BOUNDS error check at launch time. This commit enables the REMAP hardware, which allows us to specify both the component size and number of components for a transfer. We're then able to pass in the real width/nblocksx values and not hit the limits. There's a couple of "supported" CPPs in the list that we can't actually hit, but are there simply because they're possible. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c41
1 files changed, 32 insertions, 9 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
index 0b06236b3eb..225b8947171 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
@@ -112,13 +112,27 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0,
const struct nv50_m2mf_rect *src,
uint32_t nblocksx, uint32_t nblocksy)
{
+ static const struct {
+ int cs;
+ int nc;
+ } cpbs[] = {
+ [ 1] = { 1, 1 },
+ [ 2] = { 1, 2 },
+ [ 3] = { 1, 3 },
+ [ 4] = { 1, 4 },
+ [ 6] = { 2, 3 },
+ [ 8] = { 2, 4 },
+ [ 9] = { 3, 3 },
+ [12] = { 3, 4 },
+ [16] = { 4, 4 },
+ };
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nouveau_bufctx *bctx = nvc0->bufctx;
uint32_t exec;
uint32_t src_base = src->base;
uint32_t dst_base = dst->base;
- const int cpp = dst->cpp;
+ assert(dst->cpp < ARRAY_SIZE(cpbs) && cpbs[dst->cpp].cs);
assert(dst->cpp == src->cpp);
nouveau_bufctx_refn(bctx, 0, dst->bo, dst->domain | NOUVEAU_BO_WR);
@@ -126,33 +140,42 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0,
nouveau_pushbuf_bufctx(push, bctx);
nouveau_pushbuf_validate(push);
- exec = 0x200 /* 2D_ENABLE */ | 0x6 /* UNK */;
+ exec = 0x400 /* REMAP_ENABLE */ | 0x200 /* 2D_ENABLE */ | 0x6 /* UNK */;
+
+ BEGIN_NVC0(push, SUBC_COPY(0x0708), 1);
+ PUSH_DATA (push, (cpbs[dst->cpp].nc - 1) << 24 |
+ (cpbs[src->cpp].nc - 1) << 20 |
+ (cpbs[src->cpp].cs - 1) << 16 |
+ 3 << 12 /* DST_W = SRC_W */ |
+ 2 << 8 /* DST_Z = SRC_Z */ |
+ 1 << 4 /* DST_Y = SRC_Y */ |
+ 0 << 0 /* DST_X = SRC_X */);
if (nouveau_bo_memtype(dst->bo)) {
BEGIN_NVC0(push, SUBC_COPY(0x070c), 6);
PUSH_DATA (push, 0x1000 | dst->tile_mode);
- PUSH_DATA (push, dst->pitch);
+ PUSH_DATA (push, dst->width);
PUSH_DATA (push, dst->height);
PUSH_DATA (push, dst->depth);
PUSH_DATA (push, dst->z);
- PUSH_DATA (push, (dst->y << 16) | (dst->x * cpp));
+ PUSH_DATA (push, (dst->y << 16) | dst->x);
} else {
assert(!dst->z);
- dst_base += dst->y * dst->pitch + dst->x * cpp;
+ dst_base += dst->y * dst->pitch + dst->x * dst->cpp;
exec |= 0x100; /* DST_MODE_2D_LINEAR */
}
if (nouveau_bo_memtype(src->bo)) {
BEGIN_NVC0(push, SUBC_COPY(0x0728), 6);
PUSH_DATA (push, 0x1000 | src->tile_mode);
- PUSH_DATA (push, src->pitch);
+ PUSH_DATA (push, src->width);
PUSH_DATA (push, src->height);
PUSH_DATA (push, src->depth);
PUSH_DATA (push, src->z);
- PUSH_DATA (push, (src->y << 16) | (src->x * cpp));
+ PUSH_DATA (push, (src->y << 16) | src->x);
} else {
assert(!src->z);
- src_base += src->y * src->pitch + src->x * cpp;
+ src_base += src->y * src->pitch + src->x * src->cpp;
exec |= 0x080; /* SRC_MODE_2D_LINEAR */
}
@@ -163,7 +186,7 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0,
PUSH_DATA (push, dst->bo->offset + dst_base);
PUSH_DATA (push, src->pitch);
PUSH_DATA (push, dst->pitch);
- PUSH_DATA (push, nblocksx * cpp);
+ PUSH_DATA (push, nblocksx);
PUSH_DATA (push, nblocksy);
BEGIN_NVC0(push, SUBC_COPY(0x0300), 1);