diff options
| author | Ilia Mirkin <[email protected]> | 2016-09-02 23:57:06 -0400 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2016-09-03 00:01:07 -0400 |
| commit | 163a029eba9aa73e3c0b624a3067218a01a3e47b (patch) | |
| tree | a542033d2284c0bb443e22dee30189e2ede6ee26 /src/gallium/drivers/nouveau/nvc0 | |
| parent | d0cf7a6beb4470d945bccb4e753cc7eb6ca5dda8 (diff) | |
nv50,nvc0: respect render condition enable flag when clearing rt/zs
This is a newly added flag. We always pass false into it from
nv50_clear_texture, but other callers may want to respect the render
condition. (And the functions were originally spec'd to respect it.)
Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0')
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_surface.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c index a6ca6fb75a0..e3532421a84 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c @@ -344,7 +344,8 @@ nvc0_clear_render_target(struct pipe_context *pipe, nvc0_resource_fence(res, NOUVEAU_BO_WR); } - IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth); for (z = 0; z < sf->depth; ++z) { @@ -352,7 +353,8 @@ nvc0_clear_render_target(struct pipe_context *pipe, (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER; } @@ -670,7 +672,8 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe, PUSH_DATA (push, dst->u.tex.first_layer); IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), mt->ms_mode); - IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth); for (z = 0; z < sf->depth; ++z) { @@ -678,7 +681,8 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe, (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER; } |