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authorIlia Mirkin <[email protected]>2014-07-20 12:17:46 -0400
committerIlia Mirkin <[email protected]>2015-07-23 03:33:08 -0400
commit59438a4d0e8ffd7cc4c741d00eff0c87d9813b5f (patch)
tree483c33073c2250e7d200f243ef7ba6bfb753543c /src/gallium/drivers/nouveau/nvc0
parent4b2a58a523715c28c96267286054baf511e15303 (diff)
nvc0/ir: mark varyings as per-patch based on semantic name
Also add proper handling for PATCH semantics Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_program.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 014e6815dbc..80edfb19e6e 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -36,6 +36,7 @@ nvc0_shader_input_address(unsigned sn, unsigned si, unsigned ubase)
switch (sn) {
case TGSI_SEMANTIC_TESSOUTER: return 0x000 + si * 0x4;
case TGSI_SEMANTIC_TESSINNER: return 0x010 + si * 0x4;
+ case TGSI_SEMANTIC_PATCH: return 0x020 + si * 0x10;
case TGSI_SEMANTIC_PRIMID: return 0x060;
case TGSI_SEMANTIC_LAYER: return 0x064;
case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068;
@@ -66,6 +67,7 @@ nvc0_shader_output_address(unsigned sn, unsigned si, unsigned ubase)
switch (sn) {
case TGSI_SEMANTIC_TESSOUTER: return 0x000 + si * 0x4;
case TGSI_SEMANTIC_TESSINNER: return 0x010 + si * 0x4;
+ case TGSI_SEMANTIC_PATCH: return 0x020 + si * 0x10;
case TGSI_SEMANTIC_PRIMID: return 0x060;
case TGSI_SEMANTIC_LAYER: return 0x064;
case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068;
@@ -120,8 +122,6 @@ nvc0_sp_assign_input_slots(struct nv50_ir_prog_info *info)
for (i = 0; i < info->numInputs; ++i) {
offset = nvc0_shader_input_address(info->in[i].sn,
info->in[i].si, ubase);
- if (info->in[i].patch && offset >= 0x20)
- offset = 0x20 + info->in[i].si * 0x10;
for (c = 0; c < 4; ++c)
info->in[i].slot[c] = (offset + c * 0x4) / 4;
@@ -163,8 +163,6 @@ nvc0_sp_assign_output_slots(struct nv50_ir_prog_info *info)
for (i = 0; i < info->numOutputs; ++i) {
offset = nvc0_shader_output_address(info->out[i].sn,
info->out[i].si, ubase);
- if (info->out[i].patch && offset >= 0x20)
- offset = 0x20 + info->out[i].si * 0x10;
for (c = 0; c < 4; ++c)
info->out[i].slot[c] = (offset + c * 0x4) / 4;