summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/nouveau/nvc0
diff options
context:
space:
mode:
authorIlia Mirkin <[email protected]>2017-03-15 23:29:47 -0400
committerIlia Mirkin <[email protected]>2017-03-18 20:37:52 -0400
commit0e9232dbccf45ffd7e36f8cc1837a7e5e4a295de (patch)
tree49fc29db1d49f56ee2b68b9e2a01990d2813b68b /src/gallium/drivers/nouveau/nvc0
parentdab88e9af7a35ebcdd0fc87df97f4b13e908552a (diff)
nv50,nvc0: enable TEX_LZ and TXF_LZ
There should be minimal gain, if any, for nvc0, but nv50 may end up noticing more often that the lod argument is uniform. This, in turn, will remove the need for some unnecessary transformations, which were being hit due to the checks being done pre-ssa. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 3e4c4f44ba9..cfe4f677daa 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -246,6 +246,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
+ case PIPE_CAP_TGSI_TEX_TXF_LZ:
return 1;
case PIPE_CAP_COMPUTE:
return (class_3d < GP100_3D_CLASS);
@@ -284,7 +285,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_INT64_DIVMOD:
- case PIPE_CAP_TGSI_TEX_TXF_LZ:
return 0;
case PIPE_CAP_VENDOR_ID: