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authorMarek Olšák <[email protected]>2014-01-17 22:52:28 +0100
committerMarek Olšák <[email protected]>2014-02-04 20:19:16 +0100
commit0354b769c2ee865ed40e9994f2147f2d86e989b7 (patch)
tree65d9f7e4d785a9199bc9aeaa2d2527d6a5647177 /src/gallium/drivers/nouveau/nvc0
parent82c0914266ec53d59233b6d326bcfde7049da17b (diff)
gallium: remove PIPE_CAP_MAX_COMBINED_SAMPLERS
This can be derived from the shader caps. All GPUs from ATI/AMD, NVIDIA, and INTEL have separate texture slots for each shader stage.
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 94950c5a84d..752d72b5944 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -71,8 +71,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
const uint16_t class_3d = nouveau_screen(pscreen)->class_3d;
switch (param) {
- case PIPE_CAP_MAX_COMBINED_SAMPLERS:
- return 16 * 5;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 15;