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authorIlia Mirkin <[email protected]>2016-09-08 02:13:56 -0400
committerIlia Mirkin <[email protected]>2016-09-10 13:40:04 -0400
commita8c0c7301cccd6bba1842ae8aa901cd45d9d5ffd (patch)
tree307042aa435ada8d7c3c7af53b452cf7b02844e6 /src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
parenta22aee5ad1154918aff77af5102fecd2aa39a631 (diff)
gm107/ir: allow indirect inputs to be loaded by frag shader
Looks like the GM107 IPA op does not allow a separate offset when using an indirect register. Instead we must use AL2P like we do for indirect vertex operations on Kepler+. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0/nvc0_screen.c')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 0103031da66..1757cbb93a5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -349,7 +349,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
return shader != PIPE_SHADER_FRAGMENT;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
- return shader != PIPE_SHADER_FRAGMENT || class_3d < GM107_3D_CLASS;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return 1;