diff options
author | Ilia Mirkin <[email protected]> | 2014-12-30 22:27:57 -0500 |
---|---|---|
committer | Ilia Mirkin <[email protected]> | 2015-01-05 00:34:33 -0500 |
commit | 72283020093525ca5248d7f408e88b0bcba1e52b (patch) | |
tree | 550b1a5430d5486c9d4392a8c68740462362e1fa /src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h | |
parent | 7ed02b111a499ae6a2061df8abddb6a7488fb35a (diff) |
nvc0: regenerate rnndb headers
The headers hadn't been regenerated in a long time and had seen a number
of manual modifications. A few changes:
- remove nvc0_2d entirely, use the nv50 header which has the nvc0
values too
- remove 3ddefs, it's identical to the nv50 file
- move macros out into a separate file
Also the upstream rnndb changed the overall chip naming convention; this
was fixed up manually in the generated files until a better solution is
determined.
Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h')
-rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h | 67 |
1 files changed, 33 insertions, 34 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h index 35e6bfdbea2..502ae36306a 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.xml.h @@ -4,18 +4,17 @@ /* Autogenerated file, DO NOT EDIT manually! This file was generated by the rules-ng-ng headergen tool in this git repository: -http://0x04.net/cgit/index.cgi/rules-ng-ng -git clone git://0x04.net/rules-ng-ng +http://github.com/envytools/envytools/ +git clone https://github.com/envytools/envytools.git The rules-ng-ng source files this header was generated from are: -- nvc0_compute.xml ( 11145 bytes, from 2013-04-27 14:00:13) -- copyright.xml ( 6452 bytes, from 2013-02-27 22:13:22) -- nvchipsets.xml ( 3954 bytes, from 2013-04-27 14:00:13) -- nv_object.xml ( 14395 bytes, from 2013-04-27 14:00:13) -- nv_defs.xml ( 4437 bytes, from 2013-02-27 22:13:22) -- nv50_defs.xml ( 16652 bytes, from 2013-06-20 13:45:33) - -Copyright (C) 2006-2013 by the following authors: +- rnndb/graph/gf100_compute.xml ( 11143 bytes, from 2014-09-25 06:32:11) +- rnndb/copyright.xml ( 6456 bytes, from 2014-12-31 02:13:31) +- rnndb/nvchipsets.xml ( 2759 bytes, from 2014-10-05 01:51:02) +- rnndb/fifo/nv_object.xml ( 15326 bytes, from 2014-09-25 06:32:11) +- rnndb/g80_defs.xml ( 18175 bytes, from 2014-09-25 06:32:11) + +Copyright (C) 2006-2014 by the following authors: - Artur Huillet <[email protected]> (ahuillet) - Ben Skeggs (darktama, darktama_) - B. R. <[email protected]> (koala_br) @@ -27,7 +26,7 @@ Copyright (C) 2006-2013 by the following authors: - EdB <[email protected]> (edb_) - Erik Waling <[email protected]> (erikwaling) - Francisco Jerez <[email protected]> (curro) -- imirkin <[email protected]> (imirkin) +- Ilia Mirkin <[email protected]> (imirkin) - jb17bsome <[email protected]> (jb17bsome) - Jeremy Kolb <[email protected]> (kjeremy) - Laurent Carlier <[email protected]> (lordheavy) @@ -81,7 +80,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_WARP_CSTACK_SIZE 0x0000020c -#define NVC0_COMPUTE_TEX_LIMITS 0x00000210 +#define NVC0_COMPUTE_TEX_LIMITS 0x00000210 #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__MASK 0x0000000f #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__SHIFT 0 #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__MIN 0x00000000 @@ -105,14 +104,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_BIND_TSC_ACTIVE 0x00000001 #define NVC0_COMPUTE_BIND_TSC_SAMPLER__MASK 0x00000ff0 #define NVC0_COMPUTE_BIND_TSC_SAMPLER__SHIFT 4 -#define NVC0_COMPUTE_BIND_TSC_TSC__MASK 0x01fff000 +#define NVC0_COMPUTE_BIND_TSC_TSC__MASK 0x01fff000 #define NVC0_COMPUTE_BIND_TSC_TSC__SHIFT 12 #define NVC0_COMPUTE_BIND_TIC 0x0000022c #define NVC0_COMPUTE_BIND_TIC_ACTIVE 0x00000001 #define NVC0_COMPUTE_BIND_TIC_TEXTURE__MASK 0x000001fe #define NVC0_COMPUTE_BIND_TIC_TEXTURE__SHIFT 1 -#define NVC0_COMPUTE_BIND_TIC_TIC__MASK 0x7ffffe00 +#define NVC0_COMPUTE_BIND_TIC_TIC__MASK 0x7ffffe00 #define NVC0_COMPUTE_BIND_TIC_TIC__SHIFT 9 #define NVC0_COMPUTE_BIND_TSC2 0x00000230 @@ -129,10 +128,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_BIND_TIC2_TIC__MASK 0x7ffffe00 #define NVC0_COMPUTE_BIND_TIC2_TIC__SHIFT 9 -#define NVC0_COMPUTE_GRIDDIM_YX 0x00000238 -#define NVC0_COMPUTE_GRIDDIM_YX_X__MASK 0x0000ffff +#define NVC0_COMPUTE_GRIDDIM_YX 0x00000238 +#define NVC0_COMPUTE_GRIDDIM_YX_X__MASK 0x0000ffff #define NVC0_COMPUTE_GRIDDIM_YX_X__SHIFT 0 -#define NVC0_COMPUTE_GRIDDIM_YX_Y__MASK 0xffff0000 +#define NVC0_COMPUTE_GRIDDIM_YX_Y__MASK 0xffff0000 #define NVC0_COMPUTE_GRIDDIM_YX_Y__SHIFT 16 #define NVC0_COMPUTE_GRIDDIM_Z 0x0000023c @@ -148,7 +147,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_UNK028C 0x0000028c #define NVC0_COMPUTE_COMPUTE_BEGIN 0x0000029c -#define NVC0_COMPUTE_COMPUTE_BEGIN_UNK0 0x00000001 +#define NVC0_COMPUTE_COMPUTE_BEGIN_UNK0 0x00000001 #define NVC0_COMPUTE_UNK02A0 0x000002a0 @@ -174,7 +173,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_UNK0360 0x00000360 #define NVC0_COMPUTE_UNK0360_UNK0 0x00000001 -#define NVC0_COMPUTE_UNK0360_UNK8__MASK 0x00000300 +#define NVC0_COMPUTE_UNK0360_UNK8__MASK 0x00000300 #define NVC0_COMPUTE_UNK0360_UNK8__SHIFT 8 #define NVC8_COMPUTE_UNK0360_UNK10__MASK 0x00000c00 #define NVC8_COMPUTE_UNK0360_UNK10__SHIFT 10 @@ -182,9 +181,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_LAUNCH 0x00000368 #define NVC0_COMPUTE_UNK036C 0x0000036c -#define NVC0_COMPUTE_UNK036C_UNK0__MASK 0x00000003 +#define NVC0_COMPUTE_UNK036C_UNK0__MASK 0x00000003 #define NVC0_COMPUTE_UNK036C_UNK0__SHIFT 0 -#define NVC8_COMPUTE_UNK036C_UNK2__MASK 0x0000000c +#define NVC8_COMPUTE_UNK036C_UNK2__MASK 0x0000000c #define NVC8_COMPUTE_UNK036C_UNK2__SHIFT 2 #define NVC0_COMPUTE_BLOCKDIM_YX 0x000003ac @@ -193,7 +192,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_BLOCKDIM_YX_Y__MASK 0xffff0000 #define NVC0_COMPUTE_BLOCKDIM_YX_Y__SHIFT 16 -#define NVC0_COMPUTE_BLOCKDIM_Z 0x000003b0 +#define NVC0_COMPUTE_BLOCKDIM_Z 0x000003b0 #define NVC0_COMPUTE_CP_START_ID 0x000003b4 @@ -203,7 +202,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_MP_LIMIT 0x00000758 -#define NVC0_COMPUTE_LOCAL_BASE 0x0000077c +#define NVC0_COMPUTE_LOCAL_BASE 0x0000077c #define NVC0_COMPUTE_GRIDID 0x00000780 @@ -233,19 +232,19 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_UNK10F4_UNK4 0x00000010 #define NVC0_COMPUTE_UNK10F4_UNK8 0x00000100 -#define NVC0_COMPUTE_LINKED_TSC 0x00001234 +#define NVC0_COMPUTE_LINKED_TSC 0x00001234 #define NVC0_COMPUTE_UNK1288_TIC_FLUSH 0x00001288 #define NVC0_COMPUTE_UNK12AC 0x000012ac #define NVC0_COMPUTE_TSC_FLUSH 0x00001330 -#define NVC0_COMPUTE_TSC_FLUSH_SPECIFIC 0x00000001 +#define NVC0_COMPUTE_TSC_FLUSH_SPECIFIC 0x00000001 #define NVC0_COMPUTE_TSC_FLUSH_ENTRY__MASK 0x03fffff0 #define NVC0_COMPUTE_TSC_FLUSH_ENTRY__SHIFT 4 #define NVC0_COMPUTE_TIC_FLUSH 0x00001334 -#define NVC0_COMPUTE_TIC_FLUSH_SPECIFIC 0x00000001 +#define NVC0_COMPUTE_TIC_FLUSH_SPECIFIC 0x00000001 #define NVC0_COMPUTE_TIC_FLUSH_ENTRY__MASK 0x03fffff0 #define NVC0_COMPUTE_TIC_FLUSH_ENTRY__SHIFT 4 @@ -253,7 +252,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_TEX_CACHE_CTL_UNK0__MASK 0x00000007 #define NVC0_COMPUTE_TEX_CACHE_CTL_UNK0__SHIFT 0 #define NVC0_COMPUTE_TEX_CACHE_CTL_ENTRY__MASK 0x03fffff0 -#define NVC0_COMPUTE_TEX_CACHE_CTL_ENTRY__SHIFT 4 +#define NVC0_COMPUTE_TEX_CACHE_CTL_ENTRY__SHIFT 4 #define NVC0_COMPUTE_UNK1354 0x00001354 @@ -288,7 +287,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_TEX_MISC 0x00001664 #define NVC0_COMPUTE_TEX_MISC_UNK 0x00000001 -#define NVC0_COMPUTE_TEX_MISC_SEAMLESS_CUBE_MAP 0x00000002 +#define NVC0_COMPUTE_TEX_MISC_SEAMLESS_CUBE_MAP 0x00000002 #define NVC0_COMPUTE_UNK1690 0x00001690 #define NVC0_COMPUTE_UNK1690_ALWAYS_DERIV 0x00000001 @@ -300,9 +299,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_CB_BIND_INDEX__SHIFT 8 #define NVC0_COMPUTE_FLUSH 0x00001698 -#define NVC0_COMPUTE_FLUSH_CODE 0x00000001 +#define NVC0_COMPUTE_FLUSH_CODE 0x00000001 #define NVC0_COMPUTE_FLUSH_GLOBAL 0x00000010 -#define NVC0_COMPUTE_FLUSH_UNK8 0x00000100 +#define NVC0_COMPUTE_FLUSH_UNK8 0x00000100 #define NVC0_COMPUTE_FLUSH_CB 0x00001000 #define NVC0_COMPUTE_UNK1930 0x00001930 @@ -315,7 +314,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_UNK1A2C__ESIZE 0x00000004 #define NVC0_COMPUTE_UNK1A2C__LEN 0x00000005 -#define NVC0_COMPUTE_QUERY_ADDRESS_HIGH 0x00001b00 +#define NVC0_COMPUTE_QUERY_ADDRESS_HIGH 0x00001b00 #define NVC0_COMPUTE_QUERY_ADDRESS_LOW 0x00001b04 @@ -343,7 +342,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_IMAGE(i0) (0x00002700 + 0x20*(i0)) #define NVC0_COMPUTE_IMAGE__ESIZE 0x00000020 -#define NVC0_COMPUTE_IMAGE__LEN 0x00000008 +#define NVC0_COMPUTE_IMAGE__LEN 0x00000008 #define NVC0_COMPUTE_IMAGE_ADDRESS_HIGH(i0) (0x00002700 + 0x20*(i0)) @@ -353,8 +352,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_COMPUTE_IMAGE_HEIGHT(i0) (0x0000270c + 0x20*(i0)) #define NVC0_COMPUTE_IMAGE_HEIGHT_HEIGHT__MASK 0x0000ffff -#define NVC0_COMPUTE_IMAGE_HEIGHT_HEIGHT__SHIFT 0 -#define NVC0_COMPUTE_IMAGE_HEIGHT_UNK16 0x00010000 +#define NVC0_COMPUTE_IMAGE_HEIGHT_HEIGHT__SHIFT 0 +#define NVC0_COMPUTE_IMAGE_HEIGHT_UNK16 0x00010000 #define NVC0_COMPUTE_IMAGE_HEIGHT_LINEAR 0x00100000 #define NVC0_COMPUTE_IMAGE_FORMAT(i0) (0x00002710 + 0x20*(i0)) |