diff options
| author | Samuel Pitoiset <[email protected]> | 2016-12-16 14:22:16 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-01-12 15:21:47 +0100 |
| commit | 1b3b4196f08bf825d031cdf6bfcbc7dd3ccf3172 (patch) | |
| tree | 3bf1fd7eec9a3223384898b194239a9ca24e01c0 /src/gallium/drivers/nouveau/codegen | |
| parent | 75968a668e44b3fd7c9b9277937c005366fca116 (diff) | |
nv50/ir: do not insert texture barriers on gm107
It's actually useless to insert those texture barriers post RA
because the current control code (ie. st 0x0) will wait for all
dependencies before issuing a new instruction.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Pierre Moreau <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index fe18f4718de..ff253af6997 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -190,7 +190,8 @@ NVC0LegalizePostRA::NVC0LegalizePostRA(const Program *prog) : rZero(NULL), carry(NULL), pOne(NULL), - needTexBar(prog->getTarget()->getChipset() >= 0xe0) + needTexBar(prog->getTarget()->getChipset() >= 0xe0 && + prog->getTarget()->getChipset() < 0x110) { } |