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authorIlia Mirkin <[email protected]>2014-08-14 00:17:17 -0400
committerIlia Mirkin <[email protected]>2014-08-14 20:25:33 -0400
commitf08d7b8fe1e6689beb750d7654af4db228aef392 (patch)
treef37a6514244559d6071fbd3ffcd7eef55d2da288 /src/gallium/drivers/nouveau/codegen
parent88b0c6403fd97e5527a684732250162242f340c2 (diff)
nv50,nvc0: add support for fine derivatives
The quadop-based method we currently use on all chipsets already provides the fine version of the derivatives. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 14b6d68c4a1..456efcbdf72 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -531,7 +531,9 @@ static nv50_ir::operation translateOpcode(uint opcode)
NV50_IR_OPCODE_CASE(COS, COS);
NV50_IR_OPCODE_CASE(DDX, DFDX);
+ NV50_IR_OPCODE_CASE(DDX_FINE, DFDX);
NV50_IR_OPCODE_CASE(DDY, DFDY);
+ NV50_IR_OPCODE_CASE(DDY_FINE, DFDY);
NV50_IR_OPCODE_CASE(KILL, DISCARD);
NV50_IR_OPCODE_CASE(SEQ, SET);
@@ -2327,6 +2329,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
case TGSI_OPCODE_NOT:
case TGSI_OPCODE_DDX:
case TGSI_OPCODE_DDY:
+ case TGSI_OPCODE_DDX_FINE:
+ case TGSI_OPCODE_DDY_FINE:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
mkOp1(op, dstTy, dst0[c], fetchSrc(0, c));
break;