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authorAlexandre Courbot <[email protected]>2014-05-27 16:03:02 +0900
committerIlia Mirkin <[email protected]>2014-05-27 22:12:40 -0400
commitecee4c42292f8e38e59d2ee2d3513694ec58406a (patch)
tree0852a358fc7cb07af60ebb35b5faf8e2477f948d /src/gallium/drivers/nouveau/codegen
parent1973d79e274900ce687a002b94cb5b692aad9494 (diff)
nvc0/ir: use SM35 ISA with GK20A
GK20A is mostly compatible with GK104, but uses the SM35 ISA. Use the GK110 path when this chip is detected. Signed-off-by: Alexandre Courbot <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h2
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp2
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp15
3 files changed, 12 insertions, 7 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index bbb89d97932..f829aac0bcc 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -91,7 +91,7 @@ struct nv50_ir_prog_symbol
#define NVISA_GF100_CHIPSET_C0 0xc0
#define NVISA_GF100_CHIPSET_D0 0xd0
#define NVISA_GK104_CHIPSET 0xe0
-#define NVISA_GK110_CHIPSET 0xf0
+#define NVISA_GK20A_CHIPSET 0xea
#define NVISA_GM107_CHIPSET 0x110
struct nv50_ir_prog_info
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index b1f76cf8043..f69e6a183e1 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -3027,7 +3027,7 @@ TargetNVC0::createCodeEmitterNVC0(Program::Type type)
CodeEmitter *
TargetNVC0::getCodeEmitter(Program::Type type)
{
- if (chipset >= NVISA_GK110_CHIPSET)
+ if (chipset >= NVISA_GK20A_CHIPSET)
return createCodeEmitterGK110(type);
return createCodeEmitterNVC0(type);
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 064e7a2c63f..963b6e47ddf 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -49,9 +49,12 @@ TargetNVC0::getBuiltinCode(const uint32_t **code, uint32_t *size) const
{
switch (chipset & ~0xf) {
case 0xe0:
- *code = (const uint32_t *)&gk104_builtin_code[0];
- *size = sizeof(gk104_builtin_code);
- break;
+ if (chipset < NVISA_GK20A_CHIPSET) {
+ *code = (const uint32_t *)&gk104_builtin_code[0];
+ *size = sizeof(gk104_builtin_code);
+ break;
+ }
+ /* fall-through for GK20A */
case 0xf0:
case 0x100:
*code = (const uint32_t *)&gk110_builtin_code[0];
@@ -71,7 +74,9 @@ TargetNVC0::getBuiltinOffset(int builtin) const
switch (chipset & ~0xf) {
case 0xe0:
- return gk104_builtin_offsets[builtin];
+ if (chipset < NVISA_GK20A_CHIPSET)
+ return gk104_builtin_offsets[builtin];
+ /* fall-through for GK20A */
case 0xf0:
case 0x100:
return gk110_builtin_offsets[builtin];
@@ -235,7 +240,7 @@ TargetNVC0::getFileSize(DataFile file) const
{
switch (file) {
case FILE_NULL: return 0;
- case FILE_GPR: return (chipset >= NVISA_GK110_CHIPSET) ? 255 : 63;
+ case FILE_GPR: return (chipset >= NVISA_GK20A_CHIPSET) ? 255 : 63;
case FILE_PREDICATE: return 7;
case FILE_FLAGS: return 1;
case FILE_ADDRESS: return 0;