diff options
author | Samuel Pitoiset <[email protected]> | 2016-04-25 23:13:00 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2016-04-26 19:47:49 +0200 |
commit | 6fc6d548ed66caf4395190718163d964d9c0fe25 (patch) | |
tree | 3b7b342fc79d269f2ff528552f120b8fbb2d1e67 /src/gallium/drivers/nouveau/codegen | |
parent | fbeb69757c769f594d5f9340adf067a300eddc1d (diff) |
nvc0/ir: check that the image format doesn't mismatch
This re-uses NVE4_SU_INFO_CALL which is not used anymore because we
don't use our lib for format conversions. While we are at it, add a
todo for image buffers because there are some robustness-related
issues to fix.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 | ||||
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 21 |
2 files changed, 22 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index ce678983841..1376a1a0f09 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -2545,6 +2545,7 @@ Converter::handleSTORE() mkTex(OP_SUSTP, getImageTarget(code, r), code->images[r].slot, 0, dummy, src); st->tex.mask = tgsi.getDst(0).getMask(); + st->tex.format = getImageFormat(code, r); st->cache = tgsi.getCacheMode(); if (tgsi.getDst(0).isIndirect(0)) st->setIndirectR(fetchSrc(tgsi.getDst(0).getIndirect(0), 0, NULL)); @@ -2662,6 +2663,7 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) code->images[r].slot, 0, defv, srcv); tex->subOp = subOp; tex->tex.mask = 1; + tex->tex.format = getImageFormat(code, r); tex->setType(ty); if (tgsi.getSrc(0).isIndirect(0)) tex->setIndirectR(fetchSrc(tgsi.getSrc(0).getIndirect(0), 0, NULL)); diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 5326561ea04..3bce9624ab6 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -1476,7 +1476,7 @@ NVC0LoweringPass::loadMsInfo32(Value *ptr, uint32_t off) #define NVE4_SU_INFO_HEIGHT 0x24 #define NVE4_SU_INFO_DEPTH 0x28 #define NVE4_SU_INFO_TARGET 0x2c -#define NVE4_SU_INFO_CALL 0x30 +#define NVE4_SU_INFO_BSIZE 0x30 #define NVE4_SU_INFO_RAW_X 0x34 #define NVE4_SU_INFO_MS_X 0x38 #define NVE4_SU_INFO_MS_Y 0x3c @@ -1792,7 +1792,26 @@ NVC0LoweringPass::processSurfaceCoordsNVE4(TexInstruction *su) bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), TYPE_U32, bld.mkImm(0), loadSuInfo32(ind, base + NVE4_SU_INFO_ADDR)); + + if (su->tex.format) { + const TexInstruction::ImgFormatDesc *format = su->tex.format; + int blockwidth = format->bits[0] + format->bits[1] + + format->bits[2] + format->bits[3]; + + if (blockwidth >= 8) { + // make sure that the format doesn't mismatch + bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred1->getDef(0), + TYPE_U32, bld.loadImm(NULL, blockwidth / 8), + loadSuInfo32(ind, base + NVE4_SU_INFO_BSIZE), + pred1->getDef(0)); + } + } su->setPredicate(CC_NOT_P, pred1->getDef(0)); + + // TODO: initialize def values to 0 when the surface operation is not + // performed (not needed for stores). Also, fix the "address bounds test" + // subtests from arb_shader_image_load_store-invalid for buffers, because it + // seems like that the predicate is not correctly set by suclamp. } static DataType |