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authorBen Skeggs <[email protected]>2014-05-09 15:56:03 +1000
committerBen Skeggs <[email protected]>2014-05-15 09:54:46 +1000
commit7b9475fa652b9df6d599edbea8fa5049fdd995e1 (patch)
tree05cbc3fe2b8a0356e2b0a3e5fc08d8f7e795ecbd /src/gallium/drivers/nouveau/codegen
parent07d3972b4927841bb892af16ff0389f8a241b24c (diff)
nvc0: maxwell isa has no per-instruction join modifier
Signed-off-by: Ben Skeggs <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp34
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target.h3
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp2
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp3
4 files changed, 23 insertions, 19 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index cdae3c8c2ba..3005922d4f9 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -2067,22 +2067,24 @@ FlatteningPass::visit(BasicBlock *bb)
return true;
// try to attach join to previous instruction
- Instruction *insn = bb->getExit();
- if (insn && insn->op == OP_JOIN && !insn->getPredicate()) {
- insn = insn->prev;
- if (insn && !insn->getPredicate() &&
- !insn->asFlow() &&
- insn->op != OP_TEXBAR &&
- !isTextureOp(insn->op) && // probably just nve4
- !isSurfaceOp(insn->op) && // not confirmed
- insn->op != OP_LINTERP && // probably just nve4
- insn->op != OP_PINTERP && // probably just nve4
- ((insn->op != OP_LOAD && insn->op != OP_STORE) ||
- typeSizeof(insn->dType) <= 4) &&
- !insn->isNop()) {
- insn->join = 1;
- bb->remove(bb->getExit());
- return true;
+ if (prog->getTarget()->hasJoin) {
+ Instruction *insn = bb->getExit();
+ if (insn && insn->op == OP_JOIN && !insn->getPredicate()) {
+ insn = insn->prev;
+ if (insn && !insn->getPredicate() &&
+ !insn->asFlow() &&
+ insn->op != OP_TEXBAR &&
+ !isTextureOp(insn->op) && // probably just nve4
+ !isSurfaceOp(insn->op) && // not confirmed
+ insn->op != OP_LINTERP && // probably just nve4
+ insn->op != OP_PINTERP && // probably just nve4
+ ((insn->op != OP_LOAD && insn->op != OP_STORE) ||
+ typeSizeof(insn->dType) <= 4) &&
+ !insn->isNop()) {
+ insn->join = 1;
+ bb->remove(bb->getExit());
+ return true;
+ }
}
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
index 9eb0a1fe0fb..711056e5961 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
@@ -120,7 +120,7 @@ enum OpClass
class Target
{
public:
- Target(bool j, bool s) : joinAnterior(j), hasSWSched(s) { }
+ Target(bool m, bool j, bool s) : hasJoin(m), joinAnterior(j), hasSWSched(s) { }
virtual ~Target() { }
static Target *create(uint32_t chipset);
@@ -192,6 +192,7 @@ public:
virtual uint32_t getSVAddress(DataFile, const Symbol *) const = 0;
public:
+ const bool hasJoin; // true if instructions have a join modifier
const bool joinAnterior; // true if join is executed before the op
const bool hasSWSched; // true if code should provide scheduling data
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 32ba5c82ceb..799ac2fd2ab 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -29,7 +29,7 @@ Target *getTargetNV50(unsigned int chipset)
return new TargetNV50(chipset);
}
-TargetNV50::TargetNV50(unsigned int card) : Target(true, false)
+TargetNV50::TargetNV50(unsigned int card) : Target(true, true, false)
{
chipset = card;
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index adf2df8a77b..064e7a2c63f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -29,7 +29,8 @@ Target *getTargetNVC0(unsigned int chipset)
return new TargetNVC0(chipset);
}
-TargetNVC0::TargetNVC0(unsigned int card) : Target(false, card >= 0xe4)
+TargetNVC0::TargetNVC0(unsigned int card) :
+ Target(card < 0x110, false, card >= 0xe4)
{
chipset = card;
initOpInfo();