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authorKenneth Graunke <[email protected]>2018-09-26 12:51:44 +0200
committerKenneth Graunke <[email protected]>2019-02-21 10:26:08 -0800
commitd4e45175699b95455842fa74713c3dca4cadc57b (patch)
treebb548a76b0705220ad846ea59438400ceb5ec63f /src/gallium/drivers/iris/iris_query.c
parentdca5632de1eaab0006444b2954a06673c64f9d94 (diff)
iris: gen10+ workarounds and break fix
Diffstat (limited to 'src/gallium/drivers/iris/iris_query.c')
-rw-r--r--src/gallium/drivers/iris/iris_query.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_query.c b/src/gallium/drivers/iris/iris_query.c
index a8bab7d3e35..e4597ed7a7c 100644
--- a/src/gallium/drivers/iris/iris_query.c
+++ b/src/gallium/drivers/iris/iris_query.c
@@ -150,16 +150,27 @@ iris_pipelined_write(struct iris_batch *batch,
static void
write_value(struct iris_context *ice, struct iris_query *q, unsigned offset)
{
- iris_use_pinned_bo(&ice->render_batch, q->bo, true);
+ struct iris_batch *batch = &ice->render_batch;
+ const struct gen_device_info *devinfo = &batch->screen->devinfo;
+
+ iris_use_pinned_bo(batch, q->bo, true);
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
+ if (devinfo->gen >= 10) {
+ /* "Driver must program PIPE_CONTROL with only Depth Stall Enable
+ * bit set prior to programming a PIPE_CONTROL with Write PS Depth
+ * Count sync operation."
+ */
+ iris_emit_pipe_control_flush(batch, PIPE_CONTROL_DEPTH_STALL);
+ }
iris_pipelined_write(&ice->render_batch, q,
PIPE_CONTROL_WRITE_DEPTH_COUNT |
PIPE_CONTROL_DEPTH_STALL,
offset);
+ break;
case PIPE_QUERY_TIME_ELAPSED:
iris_pipelined_write(&ice->render_batch, q,
PIPE_CONTROL_WRITE_TIMESTAMP,