diff options
author | Chia-I Wu <[email protected]> | 2015-05-02 15:33:27 +0800 |
---|---|---|
committer | Chia-I Wu <[email protected]> | 2015-05-02 22:28:31 +0800 |
commit | 4348046a2f08d9795a158b96f8579f13f5e693e6 (patch) | |
tree | 08b0ad9d02dbe9db57df53376aef2e054e296541 /src/gallium/drivers/ilo | |
parent | 9b705ec32d8cd527ab8d6ebc89f6550d52908c62 (diff) |
ilo: use ilo_image exclusively in core
Initialize ilo_view_surface and ilo_zs_surface from ilo_image instead of
ilo_texture.
Diffstat (limited to 'src/gallium/drivers/ilo')
-rw-r--r-- | src/gallium/drivers/ilo/core/ilo_state_3d.h | 25 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/core/ilo_state_3d_bottom.c | 76 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/core/ilo_state_3d_top.c | 157 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_state.c | 30 |
4 files changed, 149 insertions, 139 deletions
diff --git a/src/gallium/drivers/ilo/core/ilo_state_3d.h b/src/gallium/drivers/ilo/core/ilo_state_3d.h index e772f21605c..fdce445f733 100644 --- a/src/gallium/drivers/ilo/core/ilo_state_3d.h +++ b/src/gallium/drivers/ilo/core/ilo_state_3d.h @@ -49,8 +49,8 @@ struct intel_bo; struct ilo_buffer; +struct ilo_image; struct ilo_shader_state; -struct ilo_texture; struct ilo_vb_state { struct pipe_vertex_buffer states[PIPE_MAX_ATTRIBS]; @@ -384,19 +384,22 @@ ilo_gpe_init_view_surface_for_buffer(const struct ilo_dev *dev, struct ilo_view_surface *surf); void -ilo_gpe_init_view_surface_for_texture(const struct ilo_dev *dev, - const struct ilo_texture *tex, - enum pipe_format format, - unsigned first_level, - unsigned num_levels, - unsigned first_layer, - unsigned num_layers, - bool is_rt, - struct ilo_view_surface *surf); +ilo_gpe_init_view_surface_for_image(const struct ilo_dev *dev, + const struct ilo_image *img, + enum pipe_texture_target target, + enum pipe_format format, + unsigned first_level, + unsigned num_levels, + unsigned first_layer, + unsigned num_layers, + bool is_rt, + struct ilo_view_surface *surf); void ilo_gpe_init_zs_surface(const struct ilo_dev *dev, - const struct ilo_texture *tex, + const struct ilo_image *img, + const struct ilo_image *s8_img, + enum pipe_texture_target target, enum pipe_format format, unsigned level, unsigned first_layer, unsigned num_layers, struct ilo_zs_surface *zs); diff --git a/src/gallium/drivers/ilo/core/ilo_state_3d_bottom.c b/src/gallium/drivers/ilo/core/ilo_state_3d_bottom.c index a3cbc523d26..5a4c5dde7e7 100644 --- a/src/gallium/drivers/ilo/core/ilo_state_3d_bottom.c +++ b/src/gallium/drivers/ilo/core/ilo_state_3d_bottom.c @@ -31,8 +31,8 @@ #include "util/u_half.h" #include "ilo_format.h" +#include "ilo_image.h" #include "ilo_state_3d.h" -#include "../ilo_resource.h" #include "../ilo_shader.h" static void @@ -934,7 +934,9 @@ zs_init_info_null(const struct ilo_dev *dev, static void zs_init_info(const struct ilo_dev *dev, - const struct ilo_texture *tex, + const struct ilo_image *img, + const struct ilo_image *s8_img, + enum pipe_texture_target target, enum pipe_format format, unsigned level, unsigned first_layer, unsigned num_layers, struct ilo_zs_surface_info *info) @@ -945,7 +947,7 @@ zs_init_info(const struct ilo_dev *dev, memset(info, 0, sizeof(*info)); - info->surface_type = ilo_gpe_gen6_translate_texture(tex->base.target); + info->surface_type = ilo_gpe_gen6_translate_texture(target); if (info->surface_type == GEN6_SURFTYPE_CUBE) { /* @@ -965,8 +967,7 @@ zs_init_info(const struct ilo_dev *dev, if (ilo_dev_gen(dev) >= ILO_GEN(7)) { separate_stencil = true; - } - else { + } else { /* * From the Sandy Bridge PRM, volume 2 part 1, page 317: * @@ -974,7 +975,7 @@ zs_init_info(const struct ilo_dev *dev, * same value (enabled or disabled) as Hierarchical Depth Buffer * Enable." */ - separate_stencil = ilo_image_can_enable_aux(&tex->image, level); + separate_stencil = ilo_image_can_enable_aux(img, level); } /* @@ -1028,21 +1029,18 @@ zs_init_info(const struct ilo_dev *dev, } if (format != PIPE_FORMAT_S8_UINT) { - info->zs.bo = tex->image.bo; - info->zs.stride = tex->image.bo_stride; + info->zs.bo = img->bo; + info->zs.stride = img->bo_stride; - assert(tex->image.walk_layer_height % 4 == 0); - info->zs.qpitch = tex->image.walk_layer_height / 4; + assert(img->walk_layer_height % 4 == 0); + info->zs.qpitch = img->walk_layer_height / 4; - info->zs.tiling = tex->image.tiling; + info->zs.tiling = img->tiling; info->zs.offset = 0; } - if (tex->separate_s8 || format == PIPE_FORMAT_S8_UINT) { - const struct ilo_texture *s8_tex = - (tex->separate_s8) ? tex->separate_s8 : tex; - - info->stencil.bo = s8_tex->image.bo; + if (s8_img || format == PIPE_FORMAT_S8_UINT) { + info->stencil.bo = s8_img->bo; /* * From the Sandy Bridge PRM, volume 2 part 1, page 329: @@ -1053,43 +1051,42 @@ zs_init_info(const struct ilo_dev *dev, * For GEN7, we still dobule the stride because we did not double the * slice widths when initializing the layout. */ - info->stencil.stride = s8_tex->image.bo_stride * 2; + info->stencil.stride = s8_img->bo_stride * 2; - assert(s8_tex->image.walk_layer_height % 4 == 0); - info->stencil.qpitch = s8_tex->image.walk_layer_height / 4; + assert(s8_img->walk_layer_height % 4 == 0); + info->stencil.qpitch = s8_img->walk_layer_height / 4; - info->stencil.tiling = s8_tex->image.tiling; + info->stencil.tiling = s8_img->tiling; if (ilo_dev_gen(dev) == ILO_GEN(6)) { unsigned x, y; - assert(s8_tex->image.walk == ILO_IMAGE_WALK_LOD); + assert(s8_img->walk == ILO_IMAGE_WALK_LOD); /* offset to the level */ - ilo_image_get_slice_pos(&s8_tex->image, level, 0, &x, &y); - ilo_image_pos_to_mem(&s8_tex->image, x, y, &x, &y); - info->stencil.offset = ilo_image_mem_to_raw(&s8_tex->image, x, y); + ilo_image_get_slice_pos(s8_img, level, 0, &x, &y); + ilo_image_pos_to_mem(s8_img, x, y, &x, &y); + info->stencil.offset = ilo_image_mem_to_raw(s8_img, x, y); } } - if (ilo_image_can_enable_aux(&tex->image, level)) { - info->hiz.bo = tex->image.aux.bo; - info->hiz.stride = tex->image.aux.bo_stride; + if (ilo_image_can_enable_aux(img, level)) { + info->hiz.bo = img->aux.bo; + info->hiz.stride = img->aux.bo_stride; - assert(tex->image.aux.walk_layer_height % 4 == 0); - info->hiz.qpitch = tex->image.aux.walk_layer_height / 4; + assert(img->aux.walk_layer_height % 4 == 0); + info->hiz.qpitch = img->aux.walk_layer_height / 4; info->hiz.tiling = GEN6_TILING_Y; /* offset to the level */ if (ilo_dev_gen(dev) == ILO_GEN(6)) - info->hiz.offset = tex->image.aux.walk_lod_offsets[level]; + info->hiz.offset = img->aux.walk_lod_offsets[level]; } - info->width = tex->image.width0; - info->height = tex->image.height0; - info->depth = (tex->base.target == PIPE_TEXTURE_3D) ? - tex->base.depth0 : num_layers; + info->width = img->width0; + info->height = img->height0; + info->depth = (target == PIPE_TEXTURE_3D) ? img->depth0 : num_layers; info->lod = level; info->first_layer = first_layer; @@ -1098,7 +1095,9 @@ zs_init_info(const struct ilo_dev *dev, void ilo_gpe_init_zs_surface(const struct ilo_dev *dev, - const struct ilo_texture *tex, + const struct ilo_image *img, + const struct ilo_image *s8_img, + enum pipe_texture_target target, enum pipe_format format, unsigned level, unsigned first_layer, unsigned num_layers, struct ilo_zs_surface *zs) @@ -1111,10 +1110,11 @@ ilo_gpe_init_zs_surface(const struct ilo_dev *dev, ILO_DEV_ASSERT(dev, 6, 8); - if (tex) { - zs_init_info(dev, tex, format, level, first_layer, num_layers, &info); + if (img) { + zs_init_info(dev, img, s8_img, target, format, + level, first_layer, num_layers, &info); - switch (tex->base.nr_samples) { + switch (img->sample_count) { case 2: align_w /= 2; break; diff --git a/src/gallium/drivers/ilo/core/ilo_state_3d_top.c b/src/gallium/drivers/ilo/core/ilo_state_3d_top.c index 5772ec084b1..c17957fb704 100644 --- a/src/gallium/drivers/ilo/core/ilo_state_3d_top.c +++ b/src/gallium/drivers/ilo/core/ilo_state_3d_top.c @@ -31,9 +31,10 @@ #include "util/u_half.h" #include "util/u_resource.h" +#include "ilo_buffer.h" #include "ilo_format.h" +#include "ilo_image.h" #include "ilo_state_3d.h" -#include "../ilo_resource.h" #include "../ilo_shader.h" static void @@ -554,15 +555,16 @@ view_init_for_buffer_gen6(const struct ilo_dev *dev, } static void -view_init_for_texture_gen6(const struct ilo_dev *dev, - const struct ilo_texture *tex, - enum pipe_format format, - unsigned first_level, - unsigned num_levels, - unsigned first_layer, - unsigned num_layers, - bool is_rt, - struct ilo_view_surface *surf) +view_init_for_image_gen6(const struct ilo_dev *dev, + const struct ilo_image *img, + enum pipe_texture_target target, + enum pipe_format format, + unsigned first_level, + unsigned num_levels, + unsigned first_layer, + unsigned num_layers, + bool is_rt, + struct ilo_view_surface *surf) { int surface_type, surface_format; int width, height, depth, pitch, lod; @@ -570,10 +572,10 @@ view_init_for_texture_gen6(const struct ilo_dev *dev, ILO_DEV_ASSERT(dev, 6, 6); - surface_type = ilo_gpe_gen6_translate_texture(tex->base.target); + surface_type = ilo_gpe_gen6_translate_texture(target); assert(surface_type != GEN6_SURFTYPE_BUFFER); - if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT && tex->separate_s8) + if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT && img->separate_stencil) format = PIPE_FORMAT_Z32_FLOAT; if (is_rt) @@ -582,11 +584,10 @@ view_init_for_texture_gen6(const struct ilo_dev *dev, surface_format = ilo_format_translate_texture(dev, format); assert(surface_format >= 0); - width = tex->image.width0; - height = tex->image.height0; - depth = (tex->base.target == PIPE_TEXTURE_3D) ? - tex->base.depth0 : num_layers; - pitch = tex->image.bo_stride; + width = img->width0; + height = img->height0; + depth = (target == PIPE_TEXTURE_3D) ? img->depth0 : num_layers; + pitch = img->bo_stride; if (surface_type == GEN6_SURFTYPE_CUBE) { /* @@ -640,10 +641,10 @@ view_init_for_texture_gen6(const struct ilo_dev *dev, } /* non-full array spacing is supported only on GEN7+ */ - assert(tex->image.walk != ILO_IMAGE_WALK_LOD); + assert(img->walk != ILO_IMAGE_WALK_LOD); /* non-interleaved samples are supported only on GEN7+ */ - if (tex->base.nr_samples > 1) - assert(tex->image.interleaved_samples); + if (img->sample_count > 1) + assert(img->interleaved_samples); if (is_rt) { assert(num_levels == 1); @@ -671,7 +672,7 @@ view_init_for_texture_gen6(const struct ilo_dev *dev, * * "For linear surfaces, this field (X Offset) must be zero" */ - if (tex->image.tiling == GEN6_TILING_NONE) { + if (img->tiling == GEN6_TILING_NONE) { if (is_rt) { const int elem_size = util_format_get_blocksize(format); assert(pitch % elem_size == 0); @@ -699,21 +700,21 @@ view_init_for_texture_gen6(const struct ilo_dev *dev, (width - 1) << GEN6_SURFACE_DW2_WIDTH__SHIFT | lod << GEN6_SURFACE_DW2_MIP_COUNT_LOD__SHIFT; - assert(tex->image.tiling != GEN8_TILING_W); + assert(img->tiling != GEN8_TILING_W); dw[3] = (depth - 1) << GEN6_SURFACE_DW3_DEPTH__SHIFT | (pitch - 1) << GEN6_SURFACE_DW3_PITCH__SHIFT | - tex->image.tiling; + img->tiling; dw[4] = first_level << GEN6_SURFACE_DW4_MIN_LOD__SHIFT | first_layer << 17 | (num_layers - 1) << 8 | - ((tex->base.nr_samples > 1) ? GEN6_SURFACE_DW4_MULTISAMPLECOUNT_4 : - GEN6_SURFACE_DW4_MULTISAMPLECOUNT_1); + ((img->sample_count > 1) ? GEN6_SURFACE_DW4_MULTISAMPLECOUNT_4 : + GEN6_SURFACE_DW4_MULTISAMPLECOUNT_1); dw[5] = 0; - assert(tex->image.align_j == 2 || tex->image.align_j == 4); - if (tex->image.align_j == 4) + assert(img->align_j == 2 || img->align_j == 4); + if (img->align_j == 4) dw[5] |= GEN6_SURFACE_DW5_VALIGN_4; } @@ -916,15 +917,16 @@ view_init_for_buffer_gen7(const struct ilo_dev *dev, } static void -view_init_for_texture_gen7(const struct ilo_dev *dev, - const struct ilo_texture *tex, - enum pipe_format format, - unsigned first_level, - unsigned num_levels, - unsigned first_layer, - unsigned num_layers, - bool is_rt, - struct ilo_view_surface *surf) +view_init_for_image_gen7(const struct ilo_dev *dev, + const struct ilo_image *img, + enum pipe_texture_target target, + enum pipe_format format, + unsigned first_level, + unsigned num_levels, + unsigned first_layer, + unsigned num_layers, + bool is_rt, + struct ilo_view_surface *surf) { int surface_type, surface_format; int width, height, depth, pitch, lod; @@ -932,10 +934,10 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, ILO_DEV_ASSERT(dev, 7, 8); - surface_type = ilo_gpe_gen6_translate_texture(tex->base.target); + surface_type = ilo_gpe_gen6_translate_texture(target); assert(surface_type != GEN6_SURFTYPE_BUFFER); - if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT && tex->separate_s8) + if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT && img->separate_stencil) format = PIPE_FORMAT_Z32_FLOAT; if (is_rt) @@ -944,11 +946,10 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, surface_format = ilo_format_translate_texture(dev, format); assert(surface_format >= 0); - width = tex->image.width0; - height = tex->image.height0; - depth = (tex->base.target == PIPE_TEXTURE_3D) ? - tex->base.depth0 : num_layers; - pitch = tex->image.bo_stride; + width = img->width0; + height = img->height0; + depth = (target == PIPE_TEXTURE_3D) ? img->depth0 : num_layers; + pitch = img->bo_stride; if (surface_type == GEN6_SURFTYPE_CUBE) { /* @@ -1028,7 +1029,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, * * "For linear surfaces, this field (X Offset) must be zero." */ - if (tex->image.tiling == GEN6_TILING_NONE) { + if (img->tiling == GEN6_TILING_NONE) { if (is_rt) { const int elem_size = util_format_get_blocksize(format); assert(pitch % elem_size == 0); @@ -1053,14 +1054,20 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, * returns zero for the number of layers when this field is not set. */ if (surface_type != GEN6_SURFTYPE_3D) { - if (util_resource_is_array_texture(&tex->base)) + switch (target) { + case PIPE_TEXTURE_1D_ARRAY: + case PIPE_TEXTURE_2D_ARRAY: + case PIPE_TEXTURE_CUBE_ARRAY: dw[0] |= GEN7_SURFACE_DW0_IS_ARRAY; - else + break; + default: assert(depth == 1); + break; + } } if (ilo_dev_gen(dev) >= ILO_GEN(8)) { - switch (tex->image.align_j) { + switch (img->align_j) { case 4: dw[0] |= GEN7_SURFACE_DW0_VALIGN_4; break; @@ -1075,7 +1082,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, break; } - switch (tex->image.align_i) { + switch (img->align_i) { case 4: dw[0] |= GEN8_SURFACE_DW0_HALIGN_4; break; @@ -1090,21 +1097,21 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, break; } - dw[0] |= tex->image.tiling << GEN8_SURFACE_DW0_TILING__SHIFT; + dw[0] |= img->tiling << GEN8_SURFACE_DW0_TILING__SHIFT; } else { - assert(tex->image.align_i == 4 || tex->image.align_i == 8); - assert(tex->image.align_j == 2 || tex->image.align_j == 4); + assert(img->align_i == 4 || img->align_i == 8); + assert(img->align_j == 2 || img->align_j == 4); - if (tex->image.align_j == 4) + if (img->align_j == 4) dw[0] |= GEN7_SURFACE_DW0_VALIGN_4; - if (tex->image.align_i == 8) + if (img->align_i == 8) dw[0] |= GEN7_SURFACE_DW0_HALIGN_8; - assert(tex->image.tiling != GEN8_TILING_W); - dw[0] |= tex->image.tiling << GEN7_SURFACE_DW0_TILING__SHIFT; + assert(img->tiling != GEN8_TILING_W); + dw[0] |= img->tiling << GEN7_SURFACE_DW0_TILING__SHIFT; - if (tex->image.walk == ILO_IMAGE_WALK_LOD) + if (img->walk == ILO_IMAGE_WALK_LOD) dw[0] |= GEN7_SURFACE_DW0_ARYSPC_LOD0; else dw[0] |= GEN7_SURFACE_DW0_ARYSPC_FULL; @@ -1117,8 +1124,8 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, dw[0] |= GEN7_SURFACE_DW0_CUBE_FACE_ENABLES__MASK; if (ilo_dev_gen(dev) >= ILO_GEN(8)) { - assert(tex->image.walk_layer_height % 4 == 0); - dw[1] = tex->image.walk_layer_height / 4; + assert(img->walk_layer_height % 4 == 0); + dw[1] = img->walk_layer_height / 4; } else { dw[1] = 0; } @@ -1137,7 +1144,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, * means the samples are interleaved. The layouts are the same when the * number of samples is 1. */ - if (tex->image.interleaved_samples && tex->base.nr_samples > 1) { + if (img->interleaved_samples && img->sample_count > 1) { assert(!is_rt); dw[4] |= GEN7_SURFACE_DW4_MSFMT_DEPTH_STENCIL; } @@ -1145,7 +1152,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev, dw[4] |= GEN7_SURFACE_DW4_MSFMT_MSS; } - switch (tex->base.nr_samples) { + switch (img->sample_count) { case 0: case 1: default: @@ -1223,32 +1230,30 @@ ilo_gpe_init_view_surface_for_buffer(const struct ilo_dev *dev, } void -ilo_gpe_init_view_surface_for_texture(const struct ilo_dev *dev, - const struct ilo_texture *tex, - enum pipe_format format, - unsigned first_level, - unsigned num_levels, - unsigned first_layer, - unsigned num_layers, - bool is_rt, - struct ilo_view_surface *surf) +ilo_gpe_init_view_surface_for_image(const struct ilo_dev *dev, + const struct ilo_image *img, + enum pipe_texture_target target, + enum pipe_format format, + unsigned first_level, + unsigned num_levels, + unsigned first_layer, + unsigned num_layers, + bool is_rt, + struct ilo_view_surface *surf) { if (ilo_dev_gen(dev) >= ILO_GEN(7)) { - view_init_for_texture_gen7(dev, tex, format, + view_init_for_image_gen7(dev, img, target, format, first_level, num_levels, first_layer, num_layers, is_rt, surf); } else { - view_init_for_texture_gen6(dev, tex, format, + view_init_for_image_gen6(dev, img, target, format, first_level, num_levels, first_layer, num_layers, is_rt, surf); } + surf->scanout = img->scanout; /* do not increment reference count */ - surf->bo = tex->image.bo; - - /* assume imported RTs are scanouts */ - surf->scanout = ((tex->base.bind & PIPE_BIND_SCANOUT) || - (tex->imported && (tex->base.bind & PIPE_BIND_RENDER_TARGET))); + surf->bo = img->bo; } static void diff --git a/src/gallium/drivers/ilo/ilo_state.c b/src/gallium/drivers/ilo/ilo_state.c index 45f85e79f4b..b1bd49a0b6c 100644 --- a/src/gallium/drivers/ilo/ilo_state.c +++ b/src/gallium/drivers/ilo/ilo_state.c @@ -1019,8 +1019,8 @@ ilo_create_sampler_view(struct pipe_context *pipe, "not created for sampling\n"); } - ilo_gpe_init_view_surface_for_texture(dev, tex, - templ->format, + ilo_gpe_init_view_surface_for_image(dev, &tex->image, + tex->base.target, templ->format, templ->u.tex.first_level, templ->u.tex.last_level - templ->u.tex.first_level + 1, templ->u.tex.first_layer, @@ -1045,6 +1045,7 @@ ilo_create_surface(struct pipe_context *pipe, const struct pipe_surface *templ) { const struct ilo_dev *dev = ilo_context(pipe)->dev; + struct ilo_texture *tex = ilo_texture(res); struct ilo_surface_cso *surf; surf = MALLOC_STRUCT(ilo_surface_cso); @@ -1053,34 +1054,35 @@ ilo_create_surface(struct pipe_context *pipe, surf->base = *templ; pipe_reference_init(&surf->base.reference, 1); surf->base.texture = NULL; - pipe_resource_reference(&surf->base.texture, res); + pipe_resource_reference(&surf->base.texture, &tex->base); surf->base.context = pipe; - surf->base.width = u_minify(res->width0, templ->u.tex.level); - surf->base.height = u_minify(res->height0, templ->u.tex.level); + surf->base.width = u_minify(tex->base.width0, templ->u.tex.level); + surf->base.height = u_minify(tex->base.height0, templ->u.tex.level); surf->is_rt = !util_format_is_depth_or_stencil(templ->format); if (surf->is_rt) { /* relax this? */ - assert(res->target != PIPE_BUFFER); + assert(tex->base.target != PIPE_BUFFER); /* * classic i965 sets render_cache_rw for constant buffers and sol * surfaces but not render buffers. Why? */ - ilo_gpe_init_view_surface_for_texture(dev, ilo_texture(res), + ilo_gpe_init_view_surface_for_image(dev, + &tex->image, tex->base.target, templ->format, templ->u.tex.level, 1, templ->u.tex.first_layer, templ->u.tex.last_layer - templ->u.tex.first_layer + 1, true, &surf->u.rt); - } - else { + } else { assert(res->target != PIPE_BUFFER); - ilo_gpe_init_zs_surface(dev, ilo_texture(res), - templ->format, templ->u.tex.level, - templ->u.tex.first_layer, + ilo_gpe_init_zs_surface(dev, &tex->image, + (tex->separate_s8) ? &tex->separate_s8->image : NULL, + tex->base.target, templ->format, + templ->u.tex.level, templ->u.tex.first_layer, templ->u.tex.last_layer - templ->u.tex.first_layer + 1, &surf->u.zs); } @@ -1294,8 +1296,8 @@ ilo_state_vector_init(const struct ilo_dev *dev, { ilo_gpe_set_scissor_null(dev, &vec->scissor); - ilo_gpe_init_zs_surface(dev, NULL, PIPE_FORMAT_NONE, - 0, 0, 1, &vec->fb.null_zs); + ilo_gpe_init_zs_surface(dev, NULL, NULL, PIPE_TEXTURE_2D, + PIPE_FORMAT_NONE, 0, 0, 1, &vec->fb.null_zs); util_dynarray_init(&vec->global_binding.bindings); |