ilo: let shaders determine surface counts

When a shader needs N surfaces, we should upload N surfaces and not depend on
how many are bound.  This commit is larger than it should be because we did
not export how many surfaces a surface uses before.

Signed-off-by: Chia-I Wu <[email protected]>

4 files changed, 64 insertions, 13 deletions

diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_fs.c b/src/gallium/drivers/ilo/shader/ilo_shader_fs.c
index fbf3216fa24..e41a1f64fcb 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_fs.c
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_fs.c
@@ -294,7 +294,7 @@ fs_lower_opcode_tgsi_indirect_const(struct fs_compile_context *fcc,
          simd_mode,
          GEN6_MSG_SAMPLER_LD,
          0,
-         ILO_WM_CONST_SURFACE(dim));
+         fcc->shader->bt.const_base + dim);
 
    tmp = tdst(TOY_FILE_VRF, tc_alloc_vrf(tc, param_size * 4), 0);
    inst = tc_SEND(tc, tmp, tsrc_from(offset), desc, GEN6_SFID_SAMPLER);
@@ -370,7 +370,7 @@ fs_lower_opcode_tgsi_const_gen6(struct fs_compile_context *fcc,
    msg_len = 1;
 
    desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
-         msg_type, msg_ctrl, ILO_WM_CONST_SURFACE(dim));
+         msg_type, msg_ctrl, fcc->shader->bt.const_base + dim);
 
    tmp = tc_alloc_tmp(tc);
 
@@ -417,7 +417,7 @@ fs_lower_opcode_tgsi_const_gen7(struct fs_compile_context *fcc,
          GEN6_MSG_SAMPLER_SIMD4X2,
          GEN6_MSG_SAMPLER_LD,
          0,
-         ILO_WM_CONST_SURFACE(dim));
+         fcc->shader->bt.const_base + dim);
 
    tmp = tc_alloc_tmp(tc);
    inst = tc_SEND(tc, tmp, tsrc_from(offset), desc, GEN6_SFID_SAMPLER);
@@ -714,10 +714,12 @@ fs_add_sampler_params_gen7(struct toy_compiler *tc, int msg_type,
  * Set up message registers and return the message descriptor for sampling.
  */
 static struct toy_src
-fs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
+fs_prepare_tgsi_sampling(struct fs_compile_context *fcc,
+                         const struct toy_inst *inst,
                          int base_mrf, const uint32_t *saturate_coords,
                          unsigned *ret_sampler_index)
 {
+   struct toy_compiler *tc = &fcc->tc;
    unsigned simd_mode, msg_type, msg_len, sampler_index, binding_table_index;
    struct toy_src coords[4], ddx[4], ddy[4], bias_or_lod, ref_or_si;
    int num_coords, ref_pos, num_derivs;
@@ -976,7 +978,7 @@ fs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
 
    assert(inst->src[sampler_src].file == TOY_FILE_IMM);
    sampler_index = inst->src[sampler_src].val32;
-   binding_table_index = ILO_WM_TEXTURE_SURFACE(sampler_index);
+   binding_table_index = fcc->shader->bt.tex_base + sampler_index;
 
    /*
     * From the Sandy Bridge PRM, volume 4 part 1, page 18:
@@ -1100,7 +1102,7 @@ fs_lower_opcode_tgsi_sampling(struct fs_compile_context *fcc,
    int swizzles[4], i;
    bool need_filter;
 
-   desc = fs_prepare_tgsi_sampling(tc, inst,
+   desc = fs_prepare_tgsi_sampling(fcc, inst,
          fcc->first_free_mrf,
          fcc->variant->saturate_tex_coords,
          &sampler_index);
@@ -1568,7 +1570,7 @@ fs_write_fb(struct fs_compile_context *fcc)
             mrf - fcc->first_free_mrf, 0,
             header_present, false,
             GEN6_MSG_DP_RT_WRITE,
-            ctrl, ILO_WM_DRAW_SURFACE(cbuf));
+            ctrl, fcc->shader->bt.rt_base + cbuf);
 
       tc_add2(tc, TOY_OPCODE_FB_WRITE, tdst_null(),
             tsrc(TOY_FILE_MRF, fcc->first_free_mrf, 0), desc);
@@ -1859,6 +1861,23 @@ fs_setup(struct fs_compile_context *fcc,
    fcc->shader->dispatch_16 =
       (fcc->dispatch_mode == GEN6_WM_DW5_16_PIXEL_DISPATCH);
 
+   fcc->shader->bt.rt_base = 0;
+   fcc->shader->bt.rt_count = fcc->variant->u.fs.num_cbufs;
+   /* to send EOT */
+   if (!fcc->shader->bt.rt_count)
+      fcc->shader->bt.rt_count = 1;
+
+   fcc->shader->bt.tex_base = fcc->shader->bt.rt_base +
+                              fcc->shader->bt.rt_count;
+   fcc->shader->bt.tex_count = fcc->variant->num_sampler_views;
+
+   fcc->shader->bt.const_base = fcc->shader->bt.tex_base +
+                                fcc->shader->bt.tex_count;
+   fcc->shader->bt.const_count = state->info.constant_buffer_count;
+
+   fcc->shader->bt.total_count = fcc->shader->bt.const_base +
+                                 fcc->shader->bt.const_count;
+
    return true;
 }
 
diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_gs.c b/src/gallium/drivers/ilo/shader/ilo_shader_gs.c
index 2814662043a..aeeb1778375 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_gs.c
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_gs.c
@@ -488,7 +488,7 @@ gs_lower_opcode_emit_so_static(struct gs_compile_context *gcc)
                 j == gcc->so_info->num_outputs - 1);
 
 
-            binding_table_index = ILO_GS_SO_SURFACE(j);
+            binding_table_index = gcc->shader->bt.gen6_so_base + j;
 
             gs_write_so(gcc, gcc->vars.tmp, index,
                   out, write_commit, binding_table_index);
@@ -1347,6 +1347,11 @@ gs_setup(struct gs_compile_context *gcc,
    gcc->first_free_mrf = 1;
    gcc->last_free_mrf = 15;
 
+   gcc->shader->bt.gen6_so_base = 0;
+   gcc->shader->bt.gen6_so_count = gcc->so_info->num_outputs;
+
+   gcc->shader->bt.total_count = gcc->shader->bt.gen6_so_count;
+
    return true;
 }
 
@@ -1397,6 +1402,7 @@ append_gs_to_vs(struct ilo_shader *vs, struct ilo_shader *gs, int num_verts)
    vs->stream_output = true;
    vs->gs_offsets[num_verts - 1] = gs_offset;
    vs->gs_start_grf = gs->in.start_grf;
+   vs->gs_bt_so_count = gs->bt.gen6_so_count;
 
    ilo_shader_destroy_kernel(gs);
 
diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_internal.h b/src/gallium/drivers/ilo/shader/ilo_shader_internal.h
index 498e7433be7..98ec8dd0e04 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_internal.h
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_internal.h
@@ -116,6 +116,7 @@ struct ilo_shader {
    /* for VS stream output / rasterizer discard */
    int gs_offsets[3];
    int gs_start_grf;
+   int gs_bt_so_count;
 
    void *kernel;
    int kernel_size;
@@ -132,6 +133,17 @@ struct ilo_shader {
       int clip_state_size;
    } pcb;
 
+   /* binding table */
+   struct {
+      int rt_base, rt_count;
+      int tex_base, tex_count;
+      int const_base, const_count;
+
+      int gen6_so_base, gen6_so_count;
+
+      int total_count;
+   } bt;
+
    struct list_head list;
 
    /* managed by shader cache */
@@ -168,6 +180,8 @@ struct ilo_shader_info {
 
    uint32_t shadow_samplers;
    int num_samplers;
+
+   int constant_buffer_count;
 };
 
 /**
diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_vs.c b/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
index da88e55f65a..a29baab10c1 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
@@ -130,7 +130,7 @@ vs_lower_opcode_tgsi_const_gen6(struct vs_compile_context *vcc,
    msg_len = 2;
 
    desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
-         msg_type, msg_ctrl, ILO_VS_CONST_SURFACE(dim));
+         msg_type, msg_ctrl, vcc->shader->bt.const_base + dim);
 
    tc_SEND(tc, dst, tsrc_from(header), desc, vcc->const_cache);
 }
@@ -162,7 +162,7 @@ vs_lower_opcode_tgsi_const_gen7(struct vs_compile_context *vcc,
          GEN6_MSG_SAMPLER_SIMD4X2,
          GEN6_MSG_SAMPLER_LD,
          0,
-         ILO_VS_CONST_SURFACE(dim));
+         vcc->shader->bt.const_base + dim);
 
    tc_SEND(tc, dst, tsrc_from(offset), desc, GEN6_SFID_SAMPLER);
 }
@@ -387,9 +387,11 @@ vs_add_sampler_params(struct toy_compiler *tc, int msg_type, int base_mrf,
  * Set up message registers and return the message descriptor for sampling.
  */
 static struct toy_src
-vs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
+vs_prepare_tgsi_sampling(struct vs_compile_context *vcc,
+                         const struct toy_inst *inst,
                          int base_mrf, unsigned *ret_sampler_index)
 {
+   struct toy_compiler *tc = &vcc->tc;
    unsigned simd_mode, msg_type, msg_len, sampler_index, binding_table_index;
    struct toy_src coords, ddx, ddy, bias_or_lod, ref_or_si;
    int num_coords, ref_pos, num_derivs;
@@ -502,7 +504,7 @@ vs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
 
    assert(inst->src[sampler_src].file == TOY_FILE_IMM);
    sampler_index = inst->src[sampler_src].val32;
-   binding_table_index = ILO_VS_TEXTURE_SURFACE(sampler_index);
+   binding_table_index = vcc->shader->bt.tex_base + sampler_index;
 
    /*
     * From the Sandy Bridge PRM, volume 4 part 1, page 18:
@@ -573,7 +575,7 @@ vs_lower_opcode_tgsi_sampling(struct vs_compile_context *vcc,
    unsigned swizzle_zero_mask, swizzle_one_mask, swizzle_normal_mask;
    bool need_filter;
 
-   desc = vs_prepare_tgsi_sampling(tc, inst,
+   desc = vs_prepare_tgsi_sampling(vcc, inst,
          vcc->first_free_mrf, &sampler_index);
 
    switch (inst->opcode) {
@@ -1282,6 +1284,16 @@ vs_setup(struct vs_compile_context *vcc,
    vcc->shader->pcb.clip_state_size =
       vcc->variant->u.vs.num_ucps * (sizeof(float) * 4);
 
+   vcc->shader->bt.tex_base = 0;
+   vcc->shader->bt.tex_count = vcc->variant->num_sampler_views;
+
+   vcc->shader->bt.const_base = vcc->shader->bt.tex_base +
+                                vcc->shader->bt.tex_count;
+   vcc->shader->bt.const_count = state->info.constant_buffer_count;
+
+   vcc->shader->bt.total_count = vcc->shader->bt.const_base +
+                                 vcc->shader->bt.const_count;
+
    return true;
 }