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| author | Marek Olšák <[email protected]> | 2014-12-29 14:45:49 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2015-01-07 12:06:43 +0100 |
| commit | edf18da85dd3b1865c4faaba650a8fa371b7103c (patch) | |
| tree | 5cf04bf87559911e77dd5c57093bb2d64503e390 /src/gallium/drivers/ilo/ilo_transfer.h | |
| parent | 73c2b0d18c51459697d8ec194ecfc4438c98c139 (diff) | |
radeonsi: only flush the right set of caches for CP DMA operations
That's either framebuffer caches or caches for shader resources.
The motivation is that framebuffer caches need to be flushed very rarely
here.
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/ilo/ilo_transfer.h')
0 files changed, 0 insertions, 0 deletions