diff options
author | Chia-I Wu <[email protected]> | 2014-07-28 09:50:31 +0800 |
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committer | Chia-I Wu <[email protected]> | 2014-07-28 22:57:22 +0800 |
commit | 0a0e57b0705925d2350b79a32d007d29980499d6 (patch) | |
tree | e7b2d002a24f3b4102de743bbada2467517cdeaf /src/gallium/drivers/ilo/ilo_transfer.c | |
parent | b02e993d8c73cef9bb6241622c7f9a513cdb6ad4 (diff) |
ilo: enable persistent and coherent transfers
Enable PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT and reorder caps a bit.
Diffstat (limited to 'src/gallium/drivers/ilo/ilo_transfer.c')
-rw-r--r-- | src/gallium/drivers/ilo/ilo_transfer.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/src/gallium/drivers/ilo/ilo_transfer.c b/src/gallium/drivers/ilo/ilo_transfer.c index 4d6706309be..0f1347b70a3 100644 --- a/src/gallium/drivers/ilo/ilo_transfer.c +++ b/src/gallium/drivers/ilo/ilo_transfer.c @@ -57,6 +57,15 @@ * synchronization at all on mapping. * - When PIPE_TRANSFER_MAP_DIRECTLY is set, no staging area is allowed. * - When PIPE_TRANSFER_DONTBLOCK is set, we should fail if we have to block. + * - When PIPE_TRANSFER_PERSISTENT is set, GPU may access the buffer while it + * is mapped. Synchronization is done by defining memory barriers, + * explicitly via memory_barrier() or implicitly via + * transfer_flush_region(), as well as GPU fences. + * - When PIPE_TRANSFER_COHERENT is set, updates by either CPU or GPU should + * be made visible to the other side immediately. Since the kernel flushes + * GPU caches at the end of each batch buffer, CPU always sees GPU updates. + * We could use a coherent mapping to make all persistent mappings + * coherent. * * These also apply to textures, except that we may additionally need to do * format conversion or tiling/untiling. @@ -90,7 +99,7 @@ resource_get_transfer_method(struct pipe_resource *res, unsigned usage, need_convert = false; if (need_convert) { - if (usage & PIPE_TRANSFER_MAP_DIRECTLY) + if (usage & (PIPE_TRANSFER_MAP_DIRECTLY | PIPE_TRANSFER_PERSISTENT)) return false; *method = m; @@ -104,6 +113,8 @@ resource_get_transfer_method(struct pipe_resource *res, unsigned usage, m = ILO_TRANSFER_MAP_GTT; /* to have a linear view */ else if (is->dev.has_llc) m = ILO_TRANSFER_MAP_CPU; /* fast and mostly coherent */ + else if (usage & PIPE_TRANSFER_PERSISTENT) + m = ILO_TRANSFER_MAP_GTT; /* for coherency */ else if (usage & PIPE_TRANSFER_READ) m = ILO_TRANSFER_MAP_CPU; /* gtt read is too slow */ else @@ -146,7 +157,8 @@ usage_allows_staging_bo(unsigned usage) PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_FLUSH_EXPLICIT); const unsigned reasons_against = (PIPE_TRANSFER_READ | - PIPE_TRANSFER_MAP_DIRECTLY); + PIPE_TRANSFER_MAP_DIRECTLY | + PIPE_TRANSFER_PERSISTENT); return (usage & can_writeback) && !(usage & reasons_against); } |