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authorChia-I Wu <[email protected]>2013-06-03 15:34:13 +0800
committerChia-I Wu <[email protected]>2013-06-07 11:13:16 +0800
commit4006f4ce265199b1ad8dfc9e8ca7fb5176a44527 (patch)
tree7d05b96a673719b1b5eb16dd27ac96d5d850b893 /src/gallium/drivers/ilo/ilo_state.c
parent5354dc742899c498a97fe6f64cc5d9237beb1e9f (diff)
ilo: use emit_SURFACE_STATE() for render targets
Introduce ilo_surface_cso and initialize it in create_surface(). With the change, we can emit SURFACE_STATE directly from the CSO and remove emit_surf_SURFACE_STATE(). We do not deal with depth/stencil surfaces yet.
Diffstat (limited to 'src/gallium/drivers/ilo/ilo_state.c')
-rw-r--r--src/gallium/drivers/ilo/ilo_state.c45
1 files changed, 34 insertions, 11 deletions
diff --git a/src/gallium/drivers/ilo/ilo_state.c b/src/gallium/drivers/ilo/ilo_state.c
index 35e2e85e4e4..15eb1228ace 100644
--- a/src/gallium/drivers/ilo/ilo_state.c
+++ b/src/gallium/drivers/ilo/ilo_state.c
@@ -894,21 +894,44 @@ ilo_create_surface(struct pipe_context *pipe,
struct pipe_resource *res,
const struct pipe_surface *templ)
{
- struct pipe_surface *surface;
+ struct ilo_context *ilo = ilo_context(pipe);
+ struct ilo_surface_cso *surf;
+
+ surf = MALLOC_STRUCT(ilo_surface_cso);
+ assert(surf);
+
+ surf->base = *templ;
+ pipe_reference_init(&surf->base.reference, 1);
+ surf->base.texture = NULL;
+ pipe_resource_reference(&surf->base.texture, res);
+
+ surf->base.context = pipe;
+ surf->base.width = u_minify(res->width0, templ->u.tex.level);
+ surf->base.height = u_minify(res->height0, templ->u.tex.level);
- surface = MALLOC_STRUCT(pipe_surface);
- assert(surface);
+ surf->is_rt = !util_format_is_depth_or_stencil(templ->format);
- *surface = *templ;
- pipe_reference_init(&surface->reference, 1);
- surface->texture = NULL;
- pipe_resource_reference(&surface->texture, res);
+ if (surf->is_rt) {
+ /* relax this? */
+ assert(res->target != PIPE_BUFFER);
- surface->context = pipe;
- surface->width = u_minify(res->width0, surface->u.tex.level);
- surface->height = u_minify(res->height0, surface->u.tex.level);
+ /*
+ * classic i965 sets render_cache_rw for constant buffers and sol
+ * surfaces but not render buffers. Why?
+ */
+ ilo_gpe_init_view_surface_for_texture(ilo->dev, ilo_texture(res),
+ templ->format, templ->u.tex.level, 1,
+ templ->u.tex.first_layer,
+ templ->u.tex.last_layer - templ->u.tex.first_layer + 1,
+ true, true, &surf->u.rt);
+ }
+ else {
+ assert(res->target != PIPE_BUFFER);
+
+ /* will construct dynamically */
+ }
- return surface;
+ return &surf->base;
}
static void