Merge remote branch 'upstream/gallium-0.1' into nouveau-gallium-0.1

6 files changed, 45 insertions, 49 deletions

diff --git a/src/gallium/drivers/i965simple/brw_clip.h b/src/gallium/drivers/i965simple/brw_clip.h
index a89d08b7910..d70fc094ff5 100644
--- a/src/gallium/drivers/i965simple/brw_clip.h
+++ b/src/gallium/drivers/i965simple/brw_clip.h
@@ -116,7 +116,7 @@ struct brw_clip_compile {
    unsigned last_mrf;
 
    unsigned header_position_offset;
-   unsigned offset[PIPE_ATTRIB_MAX];
+   unsigned offset[PIPE_MAX_ATTRIBS];
 };
 
 #define ATTR_SIZE  (4*4)
diff --git a/src/gallium/drivers/i965simple/brw_context.h b/src/gallium/drivers/i965simple/brw_context.h
index b83a13c3b6b..0c96ba17327 100644
--- a/src/gallium/drivers/i965simple/brw_context.h
+++ b/src/gallium/drivers/i965simple/brw_context.h
@@ -433,17 +433,17 @@ struct brw_cached_batch_item {
 

 

 

-/* Protect against a future where PIPE_ATTRIB_MAX > 32.  Wouldn't life

+/* Protect against a future where PIPE_MAX_ATTRIBS > 32.  Wouldn't life

  * be easier if C allowed arrays of packed elements?

  */

-#define ATTRIB_BIT_DWORDS  ((PIPE_ATTRIB_MAX+31)/32)

+#define ATTRIB_BIT_DWORDS  ((PIPE_MAX_ATTRIBS+31)/32)

 

 

 

 

 struct brw_vertex_info {

-   unsigned varying;  /* varying:1[PIPE_ATTRIB_MAX] */

-   unsigned sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[PIPE_ATTRIB_MAX] */

+   unsigned varying;  /* varying:1[PIPE_MAX_ATTRIBS] */

+   unsigned sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[PIPE_MAX_ATTRIBS] */

 };

 

 

@@ -496,9 +496,9 @@ struct brw_context
       /* Arrays with buffer objects to copy non-bufferobj arrays into

        * for upload:

        */

-      const struct pipe_vertex_buffer *vbo_array[PIPE_ATTRIB_MAX];

+      const struct pipe_vertex_buffer *vbo_array[PIPE_MAX_ATTRIBS];

 

-      struct brw_vertex_element_state inputs[PIPE_ATTRIB_MAX];

+      struct brw_vertex_element_state inputs[PIPE_MAX_ATTRIBS];

 

 #define BRW_NR_UPLOAD_BUFS 17

 #define BRW_UPLOAD_INIT_SIZE (128*1024)

diff --git a/src/gallium/drivers/i965simple/brw_flush.c b/src/gallium/drivers/i965simple/brw_flush.c
index 5216c680cf6..e6001c30d94 100644
--- a/src/gallium/drivers/i965simple/brw_flush.c
+++ b/src/gallium/drivers/i965simple/brw_flush.c
@@ -36,14 +36,11 @@
 #include "brw_batch.h"
 
 
-/**
- * In future we may want a fence-like interface instead of finish.
- */
 static void brw_flush( struct pipe_context *pipe,
-			unsigned flags )
+                       unsigned flags,
+                       struct pipe_fence_handle **fence )
 {
    struct brw_context *brw = brw_context(pipe);
-   struct pipe_fence_handle *fence;
 
    /* Do we need to emit an MI_FLUSH command to flush the hardware
     * caches?
@@ -65,11 +62,7 @@ static void brw_flush( struct pipe_context *pipe,
 
    /* If there are no flags, just flush pending commands to hardware:
     */
-   FLUSH_BATCH( &fence );
-
-   if (flags & PIPE_FLUSH_WAIT) {
-//      brw->winsys->wait_fence(brw->winsys, fence);
-   }
+   FLUSH_BATCH( fence );
 }
 
 
diff --git a/src/gallium/drivers/i965simple/brw_state.c b/src/gallium/drivers/i965simple/brw_state.c
index f5efe9fc06d..376f1487b29 100644
--- a/src/gallium/drivers/i965simple/brw_state.c
+++ b/src/gallium/drivers/i965simple/brw_state.c
@@ -277,45 +277,49 @@ static void brw_set_viewport_state( struct pipe_context *pipe,
 }

 

 

-static void brw_set_vertex_buffer( struct pipe_context *pipe,

-				   unsigned index,

-				   const struct pipe_vertex_buffer *buffer )

+static void brw_set_vertex_buffers(struct pipe_context *pipe,

+				   unsigned count,

+				   const struct pipe_vertex_buffer *buffers)

 {

    struct brw_context *brw = brw_context(pipe);

-   brw->vb.vbo_array[index] = buffer;

+   memcpy(brw->vb.vbo_array, buffers, count * sizeof(buffers[0]));

 }

 

-static void brw_set_vertex_element(struct pipe_context *pipe,

-                                   unsigned index,

-                                   const struct pipe_vertex_element *element)

+static void brw_set_vertex_elements(struct pipe_context *pipe,

+                                    unsigned count,

+                                    const struct pipe_vertex_element *elements)

 {

    /* flush ? */

    struct brw_context *brw = brw_context(pipe);

+   uint i;

 

-   assert(index < PIPE_ATTRIB_MAX);

-   struct brw_vertex_element_state el;

-   memset(&el, 0, sizeof(el));

+   assert(count <= PIPE_MAX_ATTRIBS);

 

-   el.ve0.src_offset = element->src_offset;

-   el.ve0.src_format = brw_translate_surface_format(element->src_format);

-   el.ve0.valid = 1;

-   el.ve0.vertex_buffer_index = element->vertex_buffer_index;

+   for (i = 0; i < count; i++) {

+      struct brw_vertex_element_state el;

+      memset(&el, 0, sizeof(el));

 

-   el.ve1.dst_offset   = index * 4;

+      el.ve0.src_offset = elements[i].src_offset;

+      el.ve0.src_format = brw_translate_surface_format(elements[i].src_format);

+      el.ve0.valid = 1;

+      el.ve0.vertex_buffer_index = elements[i].vertex_buffer_index;

 

-   el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_SRC;

-   el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_SRC;

-   el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_SRC;

-   el.ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_SRC;

+      el.ve1.dst_offset   = i * 4;

 

-   switch (element->nr_components) {

-   case 1: el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_0;

-   case 2: el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_0;

-   case 3: el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_1_FLT;

-      break;

-   }

+      el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_SRC;

+      el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_SRC;

+      el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_SRC;

+      el.ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_SRC;

 

-   brw->vb.inputs[index] = el;

+      switch (elements[i].nr_components) {

+      case 1: el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_0;

+      case 2: el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_0;

+      case 3: el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_1_FLT;

+         break;

+      }

+

+      brw->vb.inputs[i] = el;

+   }

 }

 

 

@@ -457,6 +461,6 @@ brw_init_state_functions( struct brw_context *brw )
    brw->pipe.set_scissor_state = brw_set_scissor_state;

    brw->pipe.set_sampler_textures = brw_set_sampler_textures;

    brw->pipe.set_viewport_state = brw_set_viewport_state;

-   brw->pipe.set_vertex_buffer = brw_set_vertex_buffer;

-   brw->pipe.set_vertex_element = brw_set_vertex_element;

+   brw->pipe.set_vertex_buffers = brw_set_vertex_buffers;

+   brw->pipe.set_vertex_elements = brw_set_vertex_elements;

 }

diff --git a/src/gallium/drivers/i965simple/brw_wm.c b/src/gallium/drivers/i965simple/brw_wm.c
index 1c4b5b5ede2..7fc5f59a98c 100644
--- a/src/gallium/drivers/i965simple/brw_wm.c
+++ b/src/gallium/drivers/i965simple/brw_wm.c
@@ -161,8 +161,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
 
       if (unit) {
 
-	 if (unit->compare &&
-             unit->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
+	 if (unit->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
 	    key->shadowtex_mask |= 1<<i;
 	 }
 	 if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA)
diff --git a/src/gallium/drivers/i965simple/brw_wm.h b/src/gallium/drivers/i965simple/brw_wm.h
index a1ac0f504a6..b29c4393f01 100644
--- a/src/gallium/drivers/i965simple/brw_wm.h
+++ b/src/gallium/drivers/i965simple/brw_wm.h
@@ -76,7 +76,7 @@ struct brw_wm_prog_key {
 
 #define PROGRAM_INTERNAL_PARAM
 #define MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS 1024 /* 72 for GL_ARB_f_p */
-#define BRW_WM_MAX_INSN  (MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS*3 + PIPE_ATTRIB_MAX + 3)
+#define BRW_WM_MAX_INSN  (MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS*3 + PIPE_MAX_ATTRIBS + 3)
 #define BRW_WM_MAX_GRF   128		/* hardware limit */
 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
@@ -84,7 +84,7 @@ struct brw_wm_prog_key {
 #define BRW_WM_MAX_CONST 256
 #define BRW_WM_MAX_KILLS MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS
 
-#define PAYLOAD_DEPTH     (PIPE_ATTRIB_MAX)
+#define PAYLOAD_DEPTH     (PIPE_MAX_ATTRIBS)
 
 #define MAX_IFSN 32
 #define MAX_LOOP_DEPTH 32