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authorKeith Whitwell <[email protected]>2009-11-06 13:09:12 +0000
committerKeith Whitwell <[email protected]>2009-11-06 13:28:04 +0000
commiteacd13bcc809e1e877a48c2942eb6285aa21f6be (patch)
tree3687e14acbd759be5cc42e11f44d8f77fd3e2c9f /src/gallium/drivers/i965
parent3e14a482daf5e69331efac69711534a8b66118e4 (diff)
i965g: plumb through fb_write target and eot data
Diffstat (limited to 'src/gallium/drivers/i965')
-rw-r--r--src/gallium/drivers/i965/brw_wm.h10
-rw-r--r--src/gallium/drivers/i965/brw_wm_emit.c4
-rw-r--r--src/gallium/drivers/i965/brw_wm_fp.c26
-rw-r--r--src/gallium/drivers/i965/brw_wm_pass0.c10
-rw-r--r--src/gallium/drivers/i965/brw_wm_pass1.c4
5 files changed, 29 insertions, 25 deletions
diff --git a/src/gallium/drivers/i965/brw_wm.h b/src/gallium/drivers/i965/brw_wm.h
index 7d044ff6ec8..f85a8af878d 100644
--- a/src/gallium/drivers/i965/brw_wm.h
+++ b/src/gallium/drivers/i965/brw_wm.h
@@ -142,9 +142,10 @@ struct brw_wm_instruction {
GLuint saturate:1;
GLuint writemask:4;
GLuint tex_unit:4; /* texture/sampler unit for texture instructions */
- GLuint tex_target:4; /* TGSI_TEXTURE_x for texture instructions*/
+ GLuint target:4; /* TGSI_TEXTURE_x for texture instructions,
+ * target binding table index for FB_WRITE
+ */
GLuint eot:1; /* End of thread indicator for FB_WRITE*/
- GLuint target:10; /* target binding table index for FB_WRITE*/
};
@@ -204,10 +205,9 @@ struct brw_fp_instruction {
struct brw_fp_dst dst;
struct brw_fp_src src[3];
unsigned opcode:8;
+ unsigned target:8; /* XXX: special usage for FB_WRITE */
unsigned tex_unit:4;
- unsigned tex_target:4;
- unsigned target:10; /* destination surface for FB_WRITE */
- unsigned eot:1; /* mark last instruction (usually FB_WRITE) */
+ unsigned pad:12;
};
diff --git a/src/gallium/drivers/i965/brw_wm_emit.c b/src/gallium/drivers/i965/brw_wm_emit.c
index 1c38f80cda7..a14e12f35b8 100644
--- a/src/gallium/drivers/i965/brw_wm_emit.c
+++ b/src/gallium/drivers/i965/brw_wm_emit.c
@@ -803,7 +803,7 @@ static void emit_tex( struct brw_wm_compile *c,
/* How many input regs are there?
*/
- switch (inst->tex_target) {
+ switch (inst->target) {
case TGSI_TEXTURE_1D:
emit = BRW_WRITEMASK_X;
nr = 1;
@@ -885,7 +885,7 @@ static void emit_txb( struct brw_wm_compile *c,
GLuint msg_type;
/* Shadow ignored for txb.
*/
- switch (inst->tex_target) {
+ switch (inst->target) {
case TGSI_TEXTURE_1D:
case TGSI_TEXTURE_SHADOW1D:
brw_MOV(p, brw_message_reg(2), arg[0]);
diff --git a/src/gallium/drivers/i965/brw_wm_fp.c b/src/gallium/drivers/i965/brw_wm_fp.c
index d27a768a0c5..2a207958eb4 100644
--- a/src/gallium/drivers/i965/brw_wm_fp.c
+++ b/src/gallium/drivers/i965/brw_wm_fp.c
@@ -280,18 +280,24 @@ static struct brw_fp_instruction *get_fp_inst(struct brw_wm_compile *c)
static struct brw_fp_instruction * emit_tex_op(struct brw_wm_compile *c,
GLuint op,
struct brw_fp_dst dest,
- GLuint tex_src_unit,
- GLuint tex_src_target,
+ GLuint tex_unit,
+ GLuint target,
struct brw_fp_src src0,
struct brw_fp_src src1,
struct brw_fp_src src2 )
{
struct brw_fp_instruction *inst = get_fp_inst(c);
+ if (tex_unit || target)
+ assert(op == TGSI_OPCODE_TXP ||
+ op == TGSI_OPCODE_TXB ||
+ op == TGSI_OPCODE_TEX ||
+ op == WM_FB_WRITE);
+
inst->opcode = op;
inst->dst = dest;
- inst->tex_unit = tex_src_unit;
- inst->tex_target = tex_src_target;
+ inst->tex_unit = tex_unit;
+ inst->target = target;
inst->src[0] = src0;
inst->src[1] = src1;
inst->src[2] = src2;
@@ -916,23 +922,17 @@ static void emit_fb_write( struct brw_wm_compile *c )
for (i = 0 ; i < c->key.nr_cbufs; i++) {
struct brw_fp_src outcolor;
- unsigned target = 1<<i;
-
- /* Set EOT flag on last inst:
- */
- if (i == c->key.nr_cbufs - 1)
- target |= 1;
outcolor = find_output_by_semantic(c, TGSI_SEMANTIC_COLOR, i);
- /* Use emit_tex_op so that we can specify the inst->tex_target
+ /* Use emit_tex_op so that we can specify the inst->target
* field, which is abused to contain the FB write target and the
* EOT marker
*/
emit_tex_op(c, WM_FB_WRITE,
dst_undef(),
- target,
- 0,
+ (i == c->key.nr_cbufs - 1), /* EOT */
+ i,
outcolor,
payload_r0_depth,
outdepth);
diff --git a/src/gallium/drivers/i965/brw_wm_pass0.c b/src/gallium/drivers/i965/brw_wm_pass0.c
index 53232325d27..7bb341e2c2c 100644
--- a/src/gallium/drivers/i965/brw_wm_pass0.c
+++ b/src/gallium/drivers/i965/brw_wm_pass0.c
@@ -274,9 +274,13 @@ translate_insn(struct brw_wm_compile *c,
out->opcode = inst->opcode;
out->saturate = inst->dst.saturate;
out->tex_unit = inst->tex_unit;
- out->tex_target = inst->tex_target;
- out->eot = inst->eot; //inst->Aux & 1;
- out->target = inst->target; //inst->Aux >> 1;
+ out->target = inst->target;
+
+ /* Nasty hack:
+ */
+ out->eot = (inst->opcode == WM_FB_WRITE &&
+ inst->tex_unit != 0);
+
/* Args:
*/
diff --git a/src/gallium/drivers/i965/brw_wm_pass1.c b/src/gallium/drivers/i965/brw_wm_pass1.c
index 09ad2b8f5b8..005747f00ba 100644
--- a/src/gallium/drivers/i965/brw_wm_pass1.c
+++ b/src/gallium/drivers/i965/brw_wm_pass1.c
@@ -223,11 +223,11 @@ void brw_wm_pass1( struct brw_wm_compile *c )
case TGSI_OPCODE_TEX:
case TGSI_OPCODE_TXP:
- read0 = get_texcoord_mask(inst->tex_target);
+ read0 = get_texcoord_mask(inst->target);
break;
case TGSI_OPCODE_TXB:
- read0 = get_texcoord_mask(inst->tex_target) | BRW_WRITEMASK_W;
+ read0 = get_texcoord_mask(inst->target) | BRW_WRITEMASK_W;
break;
case WM_WPOSXY: