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authorKeith Whitwell <[email protected]>2009-11-06 14:18:28 +0000
committerKeith Whitwell <[email protected]>2009-11-06 14:18:28 +0000
commit4d1ae7a546250548332e432f305ce47bd97967c3 (patch)
tree24c3e4981f30356860c895976c3f903f5f8f2112 /src/gallium/drivers/i965/brw_draw.c
parent11805726d311a5d11e58f01b2793cc19d7f98566 (diff)
i965g: propogate index size state
Diffstat (limited to 'src/gallium/drivers/i965/brw_draw.c')
-rw-r--r--src/gallium/drivers/i965/brw_draw.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/i965/brw_draw.c b/src/gallium/drivers/i965/brw_draw.c
index 88cb31ad546..84803e43bef 100644
--- a/src/gallium/drivers/i965/brw_draw.c
+++ b/src/gallium/drivers/i965/brw_draw.c
@@ -194,8 +194,10 @@ brw_draw_range_elements(struct pipe_context *pipe,
* XXX: do we need to go through state validation to achieve this?
* Could just call upload code directly.
*/
- if (brw->curr.index_buffer != index_buffer) {
+ if (brw->curr.index_buffer != index_buffer ||
+ brw->curr.index_size != index_size) {
pipe_buffer_reference( &brw->curr.index_buffer, index_buffer );
+ brw->curr.index_size = index_size;
brw->state.dirty.mesa |= PIPE_NEW_INDEX_BUFFER;
}