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authorKeith Whitwell <[email protected]>2009-10-24 11:53:43 +0100
committerKeith Whitwell <[email protected]>2009-10-24 11:53:43 +0100
commitd71af266dfe01953f2545708e16a8eb799113abb (patch)
tree1bbfd5092f646174d1e887e6dff8f9a9803cde4f /src/gallium/drivers/i965/brw_context.h
parentc93d2e4540606bfd878730351dc5b68dc6d3dd8f (diff)
i965g: first compiling file
Diffstat (limited to 'src/gallium/drivers/i965/brw_context.h')
-rw-r--r--src/gallium/drivers/i965/brw_context.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h
index 0fcb75a4409..6699d3bdb6d 100644
--- a/src/gallium/drivers/i965/brw_context.h
+++ b/src/gallium/drivers/i965/brw_context.h
@@ -119,6 +119,33 @@
struct brw_context;
+struct brw_depth_stencil_alpha_state {
+ struct pipe_depth_stencil_alpha_state templ; /* for draw module */
+
+ /* Precalculated hardware state:
+ */
+ struct brw_cc0 cc0;
+ struct brw_cc1 cc1;
+ struct brw_cc2 cc2;
+ struct brw_cc3 cc3;
+};
+
+
+struct brw_blend_state {
+ struct pipe_depth_stencil_alpha_state templ; /* for draw module */
+
+ /* Precalculated hardware state:
+ */
+ struct brw_cc3 cc3;
+ struct brw_cc5 cc5;
+ struct brw_cc6 cc6;
+ struct brw_cc7 cc7;
+};
+
+
+
+
+
#define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
#define PIPE_NEW_RAST 0x2
#define PIPE_NEW_BLEND 0x2
@@ -440,6 +467,9 @@ struct brw_context
const struct gl_vertex_program *vertex_program;
const struct gl_fragment_program *fragment_program;
struct pipe_framebuffer_state fb;
+ struct brw_depth_stencil_alpha_state *dsa;
+ struct brw_blend_state *blend;
+ struct pipe_viewport_state vp;
struct {
struct brw_state_flags dirty;