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authorStéphane Marchesin <[email protected]>2011-10-17 21:43:19 -0700
committerStéphane Marchesin <[email protected]>2011-10-17 21:43:46 -0700
commit0b3842edb1a0bc1a2163571ef476e080f7c40b0f (patch)
treee71e365492f6e8d7a633e29c6e702a9d160dad21 /src/gallium/drivers/i915
parent3637b5f0dd7e4b514f446c264827d80d7ac14289 (diff)
i915g: Use the right shader limits.
Diffstat (limited to 'src/gallium/drivers/i915')
-rw-r--r--src/gallium/drivers/i915/i915_fpc.h2
-rw-r--r--src/gallium/drivers/i915/i915_reg.h4
-rw-r--r--src/gallium/drivers/i915/i915_screen.c8
3 files changed, 9 insertions, 5 deletions
diff --git a/src/gallium/drivers/i915/i915_fpc.h b/src/gallium/drivers/i915/i915_fpc.h
index 26cf2fbbe10..bfd658f8163 100644
--- a/src/gallium/drivers/i915/i915_fpc.h
+++ b/src/gallium/drivers/i915/i915_fpc.h
@@ -37,7 +37,7 @@
#include "tgsi/tgsi_parse.h"
-#define I915_PROGRAM_SIZE 192
+#define I915_PROGRAM_SIZE (3 * I915_MAX_INSN)
/* Use those indices for pos/face routing, must be >= num of inputs */
#define I915_SEMANTIC_POS 100
diff --git a/src/gallium/drivers/i915/i915_reg.h b/src/gallium/drivers/i915/i915_reg.h
index e48a942c6fe..620c64e67a2 100644
--- a/src/gallium/drivers/i915/i915_reg.h
+++ b/src/gallium/drivers/i915/i915_reg.h
@@ -488,6 +488,10 @@
#define I915_MAX_DECL_INSN 27
#define I915_MAX_TEMPORARY 16
+#define I915_MAX_INSN (I915_MAX_DECL_INSN + \
+ I915_MAX_TEX_INSN + \
+ I915_MAX_ALU_INSN)
+
/* Each instruction is 3 dwords long, though most don't require all
* this space. Maximum of 123 instructions. Smaller maxes per insn
diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c
index 4e14b2fa5c6..75545f40172 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -117,11 +117,11 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
/* XXX: these are just shader model 2.0 values, fix this! */
switch(cap) {
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
- return 96;
+ return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
- return 64;
+ return I915_MAX_ALU_INSN;
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
- return 32;
+ return I915_MAX_TEX_INSN;
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
return 8;
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
@@ -150,7 +150,7 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
case PIPE_SHADER_CAP_INTEGERS:
return 0;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
- return 8;
+ return I915_TEX_UNITS;
default:
debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
return 0;