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author | Marek Olšák <[email protected]> | 2013-02-12 23:09:44 +0100 |
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committer | Marek Olšák <[email protected]> | 2013-02-14 14:51:46 +0100 |
commit | 2b9659c9e627ad03160899b8be04f96307d098eb (patch) | |
tree | 7e9748df912ddd32495730d9192725331748c29d /src/gallium/drivers/i915/i915_screen.h | |
parent | c840270ebe588a62f22cae34c02ceeb95345f1f4 (diff) |
r600g: properly implement S8Z24 depth-stencil format for Evergreen
I should say "fix", but it has never been used until now.
S8Z24 is the format equivalent to the GL_UNSIGNED_INT_24_8 packing,
so we'll start to see it more often with st/mesa now making smart decisions
about formats.
The DB<->CB copy can change the channel ordering for transfers, other than
that, the internal DB format doesn't really matter.
R600-R700 support is possible except shadow mapping.
FMT_24_8 is broken if the SAMPLE_C instruction is used (no idea why).
Also the sampler swizzling was broken in theory and the fact it worked was
a lucky coincidence.
radeonsi might need to port this.
Reviewed-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src/gallium/drivers/i915/i915_screen.h')
0 files changed, 0 insertions, 0 deletions