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authorRob Clark <[email protected]>2019-10-24 14:29:39 -0700
committerRob Clark <[email protected]>2019-10-29 09:19:34 -0700
commitff6e148a3d60e6e7f3b33f134228b1ed4216903e (patch)
treeaf64e6cc50acef9e7867325e6f45287194b12639 /src/gallium/drivers/freedreno
parentafd224fac371758711f356673fdfd7cb39b1eb63 (diff)
freedreno/a6xx: add a618 support
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_context.c23
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_gmem.c3
-rw-r--r--src/gallium/drivers/freedreno/freedreno_screen.c1
3 files changed, 27 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
index ec8b871a28f..1247b903501 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
@@ -92,6 +92,29 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
switch (screen->gpu_id) {
+ case 618:
+/*
+GRAS_BIN_CONTROL:
+RB_BIN_CONTROL:
+ - a618 doesn't appear to set .USE_VIZ; also bin size diffs
+
+RB_CCU_CNTL:
+ - 0x3c400004 -> 0x3e400004
+ - 0x10000000 -> 0x08000000
+
+RB_UNKNOWN_8E04: <-- see stencil-0000.rd.gz
+ - 0x01000000 -> 0x00100000
+
+SP_UNKNOWN_A0F8:
+PC_UNKNOWN_9805:
+ - 0x1 -> 0
+ */
+ fd6_ctx->magic.RB_UNKNOWN_8E04_blit = 0x00100000;
+ fd6_ctx->magic.RB_CCU_CNTL_gmem = 0x3e400004;
+ fd6_ctx->magic.RB_CCU_CNTL_bypass = 0x08000000;
+ fd6_ctx->magic.PC_UNKNOWN_9805 = 0x0;
+ fd6_ctx->magic.SP_UNKNOWN_A0F8 = 0x0;
+ break;
case 630:
fd6_ctx->magic.RB_UNKNOWN_8E04_blit = 0x01000000;
// NOTE: newer blob using 0x3c400004, need to revisit:
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 6903d9c854e..d9fabcbaa23 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -801,6 +801,9 @@ fd6_emit_tile_init(struct fd_batch *batch)
* the reset of these cmds:
*/
+// NOTE a618 not setting .USE_VIZ .. from a quick check on a630, it
+// does not appear that this bit changes much (ie. it isn't actually
+// .USE_VIZ like previous gens)
set_bin_size(ring, gmem->bin_w, gmem->bin_h,
A6XX_RB_BIN_CONTROL_USE_VIZ | 0x6000000);
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 0584ace15cc..3ee73c2c496 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -904,6 +904,7 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro)
case 540:
fd5_screen_init(pscreen);
break;
+ case 618:
case 630:
fd6_screen_init(pscreen);
break;