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authorRob Clark <[email protected]>2015-09-12 11:15:32 -0400
committerRob Clark <[email protected]>2015-09-17 19:57:52 -0400
commitc970ec0577649e2f1b0532c2a62e279b784f8687 (patch)
tree573109ad7e837ade9609c51f2e7b342a36b3e929 /src/gallium/drivers/freedreno
parent91ec210ea8e35af8a7b30fa599b67b1faa55f34c (diff)
freedreno/a4xx: wire up ucp support
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno')
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_draw.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index 2bd2ca23d54..025753c037e 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -123,6 +123,7 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
// TODO set .half_precision based on render target format,
// ie. float16 and smaller use half, float32 use full..
.half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF),
+ .ucp_enables = ctx->rasterizer ? ctx->rasterizer->clip_plane_enable : 0,
.has_per_samp = (fd4_ctx->fsaturate || fd4_ctx->vsaturate),
.vsaturate_s = fd4_ctx->vsaturate_s,
.vsaturate_t = fd4_ctx->vsaturate_t,