diff options
| author | Ilia Mirkin <[email protected]> | 2014-09-10 00:59:30 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2014-09-12 16:26:11 -0400 |
| commit | 9f5bd154d75fdb4b0029875ebb3a8267d27a290a (patch) | |
| tree | c599c2f562dd2248f780d83ebbb00634e43d784e /src/gallium/drivers/freedreno | |
| parent | 459f8f3d668f2b8b9af0747949c02cae32b5b9db (diff) | |
freedreno/ir3: add TXL support
Signed-off-by: Ilia Mirkin <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno')
| -rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_compiler.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c index 640e6b92a2b..5cae5c736f6 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c @@ -1145,6 +1145,7 @@ get_tex_info(struct ir3_compile_context *ctx, switch (inst->Instruction.Opcode) { case TGSI_OPCODE_TEX: case TGSI_OPCODE_TXB: + case TGSI_OPCODE_TXL: switch (tex) { case TGSI_TEXTURE_1D: return &tex1d; @@ -1289,7 +1290,7 @@ trans_samp(const struct instr_translater *t, add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask); add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleX, tinf->src_wrmask); - if (t->tgsi_opc == TGSI_OPCODE_TXB) + if (t->opc != OPC_SAM) add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleW, 0x1); } @@ -2093,6 +2094,7 @@ static const struct instr_translater translaters[TGSI_OPCODE_LAST] = { INSTR(TEX, trans_samp, .opc = OPC_SAM, .arg = TGSI_OPCODE_TEX), INSTR(TXP, trans_samp, .opc = OPC_SAM, .arg = TGSI_OPCODE_TXP), INSTR(TXB, trans_samp, .opc = OPC_SAMB, .arg = TGSI_OPCODE_TXB), + INSTR(TXL, trans_samp, .opc = OPC_SAML, .arg = TGSI_OPCODE_TXL), INSTR(DDX, trans_deriv, .opc = OPC_DSX), INSTR(DDY, trans_deriv, .opc = OPC_DSY), INSTR(SGT, trans_cmp), |