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authorIlia Mirkin <[email protected]>2017-07-04 17:58:41 -0400
committerIlia Mirkin <[email protected]>2017-07-04 18:27:57 -0400
commitdef1b94c333d9b646f9ef241e437850928dd7e76 (patch)
tree818827d3a76ca1726a40b57bae9c853b01d39c32 /src/gallium/drivers/freedreno
parentabe8740e337e7a4b0b9a340506799362d356e6ef (diff)
a5xx: implement logicop support
The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno')
-rw-r--r--src/gallium/drivers/freedreno/a5xx/a5xx.xml.h9
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_blend.c9
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_emit.c2
3 files changed, 13 insertions, 7 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h b/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h
index b3306a5e795..1e897530743 100644
--- a/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h
+++ b/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h
@@ -8,7 +8,7 @@ http://github.com/freedreno/envytools/
git clone https://github.com/freedreno/envytools.git
The rules-ng-ng source files this header was generated from are:
-- /home/ilia/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 141534 bytes, from 2017-07-04 21:36:44)
+- /home/ilia/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 141659 bytes, from 2017-07-04 21:50:01)
- /home/ilia/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-11 01:04:14)
- /home/ilia/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-07-04 02:59:47)
- /home/ilia/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 31866 bytes, from 2017-07-04 02:59:47)
@@ -3039,6 +3039,13 @@ static inline uint32_t REG_A5XX_RB_MRT(uint32_t i0) { return 0x0000e150 + 0x7*i0
static inline uint32_t REG_A5XX_RB_MRT_CONTROL(uint32_t i0) { return 0x0000e150 + 0x7*i0; }
#define A5XX_RB_MRT_CONTROL_BLEND 0x00000001
#define A5XX_RB_MRT_CONTROL_BLEND2 0x00000002
+#define A5XX_RB_MRT_CONTROL_ROP_ENABLE 0x00000004
+#define A5XX_RB_MRT_CONTROL_ROP_CODE__MASK 0x00000078
+#define A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT 3
+static inline uint32_t A5XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)
+{
+ return ((val) << A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A5XX_RB_MRT_CONTROL_ROP_CODE__MASK;
+}
#define A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK 0x00000780
#define A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT 7
static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
index 25d9946fb13..98b6d4498e5 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
@@ -59,12 +59,12 @@ fd5_blend_state_create(struct pipe_context *pctx,
const struct pipe_blend_state *cso)
{
struct fd5_blend_stateobj *so;
-// enum a3xx_rop_code rop = ROP_COPY;
+ enum a3xx_rop_code rop = ROP_COPY;
bool reads_dest = false;
unsigned i, mrt_blend = 0;
if (cso->logicop_enable) {
-// rop = cso->logicop_func; /* maps 1:1 */
+ rop = cso->logicop_func; /* maps 1:1 */
switch (cso->logicop_func) {
case PIPE_LOGICOP_NOR:
@@ -117,9 +117,8 @@ fd5_blend_state_create(struct pipe_context *pctx,
so->rb_mrt[i].control =
-// A5XX_RB_MRT_CONTROL_ROP_CODE(rop) |
-// COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) |
- 0x60 | /* XXX set other than RECTLIST clear blits?? */
+ A5XX_RB_MRT_CONTROL_ROP_CODE(rop) |
+ COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) |
A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
if (rt->blend_enable) {
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index c875365303f..a4f475a9b5b 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -679,7 +679,7 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (is_int) {
control &= A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;
-// control |= A5XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY);
+ control |= A5XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY);
}
if (has_alpha) {