diff options
| author | Rob Clark <[email protected]> | 2016-05-06 13:21:08 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2016-05-09 11:51:59 -0400 |
| commit | f33083a216563abac307c414bba2e32dc7405fea (patch) | |
| tree | 1895635f33a912808ed0b5dc40bd8c932f48fe58 /src/gallium/drivers/freedreno | |
| parent | a0d9279e3b31ce5e5bb2baf857134bd5f48dbf65 (diff) | |
freedreno/ir3: allow for additional VS sysval inputs
There are a total of four possible currently, rather than 2. So we need
to be prepared for the input array to grow by 16 components. We could
get away with less if we could pack sysval inputs.. and the way this is
handled currently isn't really the nicest thing. But it's a tactical
fix for an issue hit in:
GL31-CTS.gtf30.GL3Tests.transform_feedback.transform_feedback_vertex_id
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno')
| -rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c index 69e8335a203..34f1d9009c4 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c @@ -2062,11 +2062,14 @@ setup_input(struct ir3_compile *ctx, nir_variable *in) instr = create_frag_input(ctx, use_ldlv); } + compile_assert(ctx, idx < ctx->ir->ninputs); + ctx->ir->inputs[idx] = instr; } } else if (ctx->so->type == SHADER_VERTEX) { for (int i = 0; i < ncomp; i++) { unsigned idx = (n * 4) + i; + compile_assert(ctx, idx < ctx->ir->ninputs); ctx->ir->inputs[idx] = create_input(ctx->block, idx); } } else { @@ -2170,7 +2173,7 @@ emit_instructions(struct ir3_compile *ctx) /* or vtx shaders, we need to leave room for sysvals: */ if (ctx->so->type == SHADER_VERTEX) { - ninputs += 8; + ninputs += 16; } ctx->ir = ir3_create(ctx->compiler, ninputs, noutputs); @@ -2181,7 +2184,7 @@ emit_instructions(struct ir3_compile *ctx) list_addtail(&ctx->block->node, &ctx->ir->block_list); if (ctx->so->type == SHADER_VERTEX) { - ctx->ir->ninputs -= 8; + ctx->ir->ninputs -= 16; } /* for fragment shader, we have a single input register (usually |