diff options
author | Rob Clark <[email protected]> | 2018-08-10 14:16:54 -0400 |
---|---|---|
committer | Rob Clark <[email protected]> | 2018-08-14 17:59:02 -0400 |
commit | 4813060ed4d1d59367b145a72786a92a2bc6c40e (patch) | |
tree | ed9274b37c3e10218c123507359ec9e75bbd1baa /src/gallium/drivers/freedreno/ir3 | |
parent | fdd35f497bd9fe840b5bcc4a21464967e7abf866 (diff) |
freedreno/ir3: small RA cleanup
Collapse is_temp() into it's only callsite, and pass compiler object as
struct rather than void. Just cleanups to reduce noise in next patch.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/ir3')
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3.h | 2 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_ra.c | 19 |
2 files changed, 8 insertions, 13 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h b/src/gallium/drivers/freedreno/ir3/ir3.h index 1152ea300b1..8bac91660bc 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3.h +++ b/src/gallium/drivers/freedreno/ir3/ir3.h @@ -1004,7 +1004,7 @@ void ir3_sched_add_deps(struct ir3 *ir); int ir3_sched(struct ir3 *ir); /* register assignment: */ -struct ir3_ra_reg_set * ir3_ra_alloc_reg_set(void *memctx); +struct ir3_ra_reg_set * ir3_ra_alloc_reg_set(struct ir3_compiler *compiler); int ir3_ra(struct ir3 *ir3, enum shader_t type, bool frag_coord, bool frag_face); diff --git a/src/gallium/drivers/freedreno/ir3/ir3_ra.c b/src/gallium/drivers/freedreno/ir3/ir3_ra.c index 83bc375aeb5..a1c048c4a15 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_ra.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_ra.c @@ -194,9 +194,9 @@ build_q_values(unsigned int **q_values, unsigned off, * really just four scalar registers. Don't let that confuse you.) */ struct ir3_ra_reg_set * -ir3_ra_alloc_reg_set(void *memctx) +ir3_ra_alloc_reg_set(struct ir3_compiler *compiler) { - struct ir3_ra_reg_set *set = rzalloc(memctx, struct ir3_ra_reg_set); + struct ir3_ra_reg_set *set = rzalloc(compiler, struct ir3_ra_reg_set); unsigned ra_reg_count, reg, first_half_reg, first_high_reg, base; unsigned int **q_values; @@ -365,8 +365,12 @@ size_to_class(unsigned sz, bool half, bool high) } static bool -is_temp(struct ir3_register *reg) +writes_gpr(struct ir3_instruction *instr) { + if (is_store(instr)) + return false; + /* is dest a normal temp register: */ + struct ir3_register *reg = instr->regs[0]; if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED)) return false; if ((reg->num == regid(REG_A0, 0)) || @@ -376,15 +380,6 @@ is_temp(struct ir3_register *reg) } static bool -writes_gpr(struct ir3_instruction *instr) -{ - if (is_store(instr)) - return false; - /* is dest a normal temp register: */ - return is_temp(instr->regs[0]); -} - -static bool instr_before(struct ir3_instruction *a, struct ir3_instruction *b) { if (a->flags & IR3_INSTR_UNUSED) |