diff options
author | Rob Clark <[email protected]> | 2014-10-24 09:38:33 -0400 |
---|---|---|
committer | Rob Clark <[email protected]> | 2014-10-25 12:07:34 -0400 |
commit | 4dff2a642913cb9b72eccc3c290b1e5a71560156 (patch) | |
tree | 0bc4f7ebf310746d9c833444de02b98cf3d01b37 /src/gallium/drivers/freedreno/ir3 | |
parent | 33193540fcb2208b040afb956bd25c6583af60d2 (diff) |
freedreno/ir3: always mov tex coords
Always insert extra mov's for the tex coord into the fanin. This
simplifies things a bit, and avoids a scenario where multiple sam
instructions can have mutually exclusive input's to it's fanin, for
example:
1: TEX OUT[0].xy, IN[0].xyxx, SAMP[0], 2D
2: TEX OUT[0].zw, IN[0].yxxx, SAMP[0], 2D
The CP pass can always remove the mov's that are not actually needed,
so better to start out with too many mov's in the front end, than not
enough.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/ir3')
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_compiler.c | 84 |
1 files changed, 30 insertions, 54 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c index 681545bd313..aaf362d5a74 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c @@ -1222,64 +1222,40 @@ get_tex_coord(struct ir3_compile_context *ctx, struct tgsi_src_register *coord = &inst->Src[0].Register; struct ir3_instruction *instr; unsigned tex = inst->Texture.Texture; - bool needs_mov = false; - - /* cat5 instruction cannot seem to handle const or relative: */ - if (is_rel_or_const(coord)) - needs_mov = true; - - /* 1D textures we fix up w/ 0.5 as 2nd coord: */ - if (is_1d(tex)) - needs_mov = true; - - /* The texture sample instructions need to coord in successive - * registers/components (ie. src.xy but not src.yx). And TXP - * needs the .w component in .z for 2D.. so in some cases we - * might need to emit some mov instructions to shuffle things - * around: - */ - if (!needs_mov) - needs_mov = !check_swiz(coord, tinf->order); - - if (needs_mov) { - struct tgsi_dst_register tmp_dst; - struct tgsi_src_register *tmp_src; - unsigned j; - - type_t type_mov = get_ftype(ctx); - - /* need to move things around: */ - tmp_src = get_internal_temp(ctx, &tmp_dst); - - for (j = 0; j < 4; j++) { - if (tinf->order[j] < 0) - continue; - instr = instr_create(ctx, 1, 0); /* mov */ - instr->cat1.src_type = type_mov; - instr->cat1.dst_type = type_mov; - add_dst_reg(ctx, instr, &tmp_dst, j); - add_src_reg(ctx, instr, coord, - src_swiz(coord, tinf->order[j])); - } + struct tgsi_dst_register tmp_dst; + struct tgsi_src_register *tmp_src; + type_t type_mov = get_ftype(ctx); + unsigned j; - /* fix up .y coord: */ - if (is_1d(tex)) { - struct ir3_register *imm; - instr = instr_create(ctx, 1, 0); /* mov */ - instr->cat1.src_type = type_mov; - instr->cat1.dst_type = type_mov; - add_dst_reg(ctx, instr, &tmp_dst, 1); /* .y */ - imm = ir3_reg_create(instr, 0, IR3_REG_IMMED); - if (inst->Instruction.Opcode == TGSI_OPCODE_TXF) - imm->iim_val = 0; - else - imm->fim_val = 0.5; - } + /* need to move things around: */ + tmp_src = get_internal_temp(ctx, &tmp_dst); - coord = tmp_src; + for (j = 0; j < 4; j++) { + if (tinf->order[j] < 0) + continue; + instr = instr_create(ctx, 1, 0); /* mov */ + instr->cat1.src_type = type_mov; + instr->cat1.dst_type = type_mov; + add_dst_reg(ctx, instr, &tmp_dst, j); + add_src_reg(ctx, instr, coord, + src_swiz(coord, tinf->order[j])); + } + + /* fix up .y coord: */ + if (is_1d(tex)) { + struct ir3_register *imm; + instr = instr_create(ctx, 1, 0); /* mov */ + instr->cat1.src_type = type_mov; + instr->cat1.dst_type = type_mov; + add_dst_reg(ctx, instr, &tmp_dst, 1); /* .y */ + imm = ir3_reg_create(instr, 0, IR3_REG_IMMED); + if (inst->Instruction.Opcode == TGSI_OPCODE_TXF) + imm->iim_val = 0; + else + imm->fim_val = 0.5; } - return coord; + return tmp_src; } static void |