freedreno/a3xx: disable early-z when we have kill's

Signed-off-by: Rob Clark <[email protected]>

2 files changed, 7 insertions, 0 deletions

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index 8c4ec88ccc0..dc4f985f4b7 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -2047,6 +2047,8 @@ trans_kill(const struct instr_translater *t,
 	ir3_reg_create(instr, 0, IR3_REG_SSA)->instr = cond;
 
 	ctx->kill[ctx->kill_count++] = instr;
+
+	ctx->so->has_kill = true;
 }
 
 /*
@@ -2081,6 +2083,8 @@ trans_killif(const struct instr_translater *t,
 
 	ctx->kill[ctx->kill_count++] = instr;
 
+	ctx->so->has_kill = true;
+
 }
 /*
  * I2F / U2F / F2I / F2U
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
index 628c09e1be3..a26dab2e8e1 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -171,6 +171,9 @@ struct ir3_shader_variant {
 	/* do we have one or more texture sample instructions: */
 	bool has_samp;
 
+	/* do we have kill instructions: */
+	bool has_kill;
+
 	/* const reg # of first immediate, ie. 1 == c1
 	 * (not regid, because TGSI thinks in terms of vec4 registers,
 	 * not scalar registers)