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authorRob Clark <[email protected]>2015-06-13 09:14:31 -0400
committerRob Clark <[email protected]>2015-06-21 08:01:12 -0400
commit66a93a0ff9aa402c37aa9d00b4489715d611b496 (patch)
treef2c86866aa26482b2ebbb0bd04794386ae9b561c /src/gallium/drivers/freedreno/ir3/ir3_ra.c
parent1ee4d51e7a68f8f2dcb52a0e2f9af81fdbe078a2 (diff)
freedreno/ir3: pass sz to split_dest()
For query_levels, we generate a getinfo with writemask of (z), which RA will consider as size==3. But we were still generating four fanouts. Which meant that RA would see it as two different register classes, depending on the path to definer. Ie. on the getinfo instruction itself it would see size==3, but when chasing back through the fanouts it would see size==4. Easiest way to solve that is to just generate the chain of neighboring fanouts to have the correct size in the first place. Note: we may eventually want split_dest() to take start/end or wrmask instead, since really we only need size==1. But RA is not clever enough for that, query_levels is not that common, and the other two registers that get allocated are never used so those register slots can be immediately re-used. So bunch of work for probably no real gain. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/ir3/ir3_ra.c')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_ra.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_ra.c b/src/gallium/drivers/freedreno/ir3/ir3_ra.c
index 359cd9a0d5d..e5aba859fab 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_ra.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_ra.c
@@ -424,6 +424,8 @@ get_definer(struct ir3_instruction *instr, int *sz, int *off)
*sz = MAX2(*sz, dsz);
+ /* Fanout's are grouped, so *off should already valid */
+
d = dd;
}