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authorRob Clark <[email protected]>2016-01-17 12:21:45 -0500
committerRob Clark <[email protected]>2016-01-17 12:21:45 -0500
commit02ac91d717036be0c8390b99860d37ff390c50e2 (patch)
tree24a92ca44628dcf1740e1888cce071747014aa8c /src/gallium/drivers/freedreno/ir3/ir3_depth.c
parent2a6ec1e0615127d036acfbece59576e9ef2527bc (diff)
freedreno/ir3: fix mad 3rd src delay calc
In fad158a0 ("freedreno/ir3: array rework") the src # (n) shifted by one, but missed updating delay-slot calc. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/ir3/ir3_depth.c')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_depth.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_depth.c b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
index 3354cbd23fa..6d294f1a48c 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_depth.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
@@ -76,7 +76,7 @@ int ir3_delayslots(struct ir3_instruction *assigner,
return 6;
} else if ((consumer->category == 3) &&
(is_mad(consumer->opc) || is_madsh(consumer->opc)) &&
- (n == 2)) {
+ (n == 3)) {
/* special case, 3rd src to cat3 not required on first cycle */
return 1;
} else {